1 files changed, 24 insertions, 24 deletions
diff --git a/llvm/test/CodeGen/SystemZ/atomicrmw-minmax-02.ll b/llvm/test/CodeGen/SystemZ/atomicrmw-minmax-02.ll
index 78c95df11f4..2f6d3eddc07 100644
--- a/llvm/test/CodeGen/SystemZ/atomicrmw-minmax-02.ll
+++ b/llvm/test/CodeGen/SystemZ/atomicrmw-minmax-02.ll
@@ -13,7 +13,7 @@
 ;   before being used, and that the low bits are set to 1.  This sequence is
 ;   independent of the other loop prologue instructions.
 define i16 @f1(i16 *%src, i16 %b) {
-; CHECK: f1:
+; CHECK-LABEL: f1:
 ; CHECK-DAG: sllg [[SHIFT:%r[1-9]+]], %r2, 3
 ; CHECK-DAG: risbg [[BASE:%r[1-9]+]], %r2, 0, 189, 0
 ; CHECK: l [[OLD:%r[0-9]+]], 0([[BASE]])
@@ -28,7 +28,7 @@ define i16 @f1(i16 *%src, i16 %b) {
 ; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
 ; CHECK: br %r14
 ;
-; CHECK-SHIFT1: f1:
+; CHECK-SHIFT1-LABEL: f1:
 ; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
 ; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
 ; CHECK-SHIFT1: rll
@@ -36,7 +36,7 @@ define i16 @f1(i16 *%src, i16 %b) {
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
-; CHECK-SHIFT2: f1:
+; CHECK-SHIFT2-LABEL: f1:
 ; CHECK-SHIFT2: sll %r3, 16
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: crjle {{%r[0-9]+}}, %r3
@@ -49,7 +49,7 @@ define i16 @f1(i16 *%src, i16 %b) {
 
 ; Check signed maximum.
 define i16 @f2(i16 *%src, i16 %b) {
-; CHECK: f2:
+; CHECK-LABEL: f2:
 ; CHECK-DAG: sllg [[SHIFT:%r[1-9]+]], %r2, 3
 ; CHECK-DAG: risbg [[BASE:%r[1-9]+]], %r2, 0, 189, 0
 ; CHECK: l [[OLD:%r[0-9]+]], 0([[BASE]])
@@ -64,7 +64,7 @@ define i16 @f2(i16 *%src, i16 %b) {
 ; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
 ; CHECK: br %r14
 ;
-; CHECK-SHIFT1: f2:
+; CHECK-SHIFT1-LABEL: f2:
 ; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
 ; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
 ; CHECK-SHIFT1: rll
@@ -72,7 +72,7 @@ define i16 @f2(i16 *%src, i16 %b) {
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
-; CHECK-SHIFT2: f2:
+; CHECK-SHIFT2-LABEL: f2:
 ; CHECK-SHIFT2: sll %r3, 16
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: crjhe {{%r[0-9]+}}, %r3
@@ -85,7 +85,7 @@ define i16 @f2(i16 *%src, i16 %b) {
 
 ; Check unsigned minimum.
 define i16 @f3(i16 *%src, i16 %b) {
-; CHECK: f3:
+; CHECK-LABEL: f3:
 ; CHECK-DAG: sllg [[SHIFT:%r[1-9]+]], %r2, 3
 ; CHECK-DAG: risbg [[BASE:%r[1-9]+]], %r2, 0, 189, 0
 ; CHECK: l [[OLD:%r[0-9]+]], 0([[BASE]])
@@ -101,7 +101,7 @@ define i16 @f3(i16 *%src, i16 %b) {
 ; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
 ; CHECK: br %r14
 ;
-; CHECK-SHIFT1: f3:
+; CHECK-SHIFT1-LABEL: f3:
 ; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
 ; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
 ; CHECK-SHIFT1: rll
@@ -109,7 +109,7 @@ define i16 @f3(i16 *%src, i16 %b) {
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
-; CHECK-SHIFT2: f3:
+; CHECK-SHIFT2-LABEL: f3:
 ; CHECK-SHIFT2: sll %r3, 16
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: clr {{%r[0-9]+}}, %r3
@@ -122,7 +122,7 @@ define i16 @f3(i16 *%src, i16 %b) {
 
 ; Check unsigned maximum.
 define i16 @f4(i16 *%src, i16 %b) {
-; CHECK: f4:
+; CHECK-LABEL: f4:
 ; CHECK-DAG: sllg [[SHIFT:%r[1-9]+]], %r2, 3
 ; CHECK-DAG: risbg [[BASE:%r[1-9]+]], %r2, 0, 189, 0
 ; CHECK: l [[OLD:%r[0-9]+]], 0([[BASE]])
@@ -138,7 +138,7 @@ define i16 @f4(i16 *%src, i16 %b) {
 ; CHECK: rll %r2, [[OLD]], 16([[SHIFT]])
 ; CHECK: br %r14
 ;
-; CHECK-SHIFT1: f4:
+; CHECK-SHIFT1-LABEL: f4:
 ; CHECK-SHIFT1: sllg [[SHIFT:%r[1-9]+]], %r2, 3
 ; CHECK-SHIFT1: lcr [[NEGSHIFT:%r[1-9]+]], [[SHIFT]]
 ; CHECK-SHIFT1: rll
@@ -146,7 +146,7 @@ define i16 @f4(i16 *%src, i16 %b) {
 ; CHECK-SHIFT1: rll
 ; CHECK-SHIFT1: br %r14
 ;
-; CHECK-SHIFT2: f4:
+; CHECK-SHIFT2-LABEL: f4:
 ; CHECK-SHIFT2: sll %r3, 16
 ; CHECK-SHIFT2: rll
 ; CHECK-SHIFT2: clr {{%r[0-9]+}}, %r3
@@ -160,15 +160,15 @@ define i16 @f4(i16 *%src, i16 %b) {
 ; Check the lowest useful signed minimum value.  We need to load 0x80010000
 ; into the source register.
 define i16 @f5(i16 *%src) {
-; CHECK: f5:
+; CHECK-LABEL: f5:
 ; CHECK: llilh [[SRC2:%r[0-9]+]], 32769
 ; CHECK: crjle [[ROT:%r[0-9]+]], [[SRC2]]
 ; CHECK: risbg [[ROT]], [[SRC2]], 32, 47, 0
 ; CHECK: br %r14
 ;
-; CHECK-SHIFT1: f5:
+; CHECK-SHIFT1-LABEL: f5:
 ; CHECK-SHIFT1: br %r14
-; CHECK-SHIFT2: f5:
+; CHECK-SHIFT2-LABEL: f5:
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw min i16 *%src, i16 -32767 seq_cst
   ret i16 %res
@@ -177,15 +177,15 @@ define i16 @f5(i16 *%src) {
 ; Check the highest useful signed maximum value.  We need to load 0x7ffe0000
 ; into the source register.
 define i16 @f6(i16 *%src) {
-; CHECK: f6:
+; CHECK-LABEL: f6:
 ; CHECK: llilh [[SRC2:%r[0-9]+]], 32766
 ; CHECK: crjhe [[ROT:%r[0-9]+]], [[SRC2]]
 ; CHECK: risbg [[ROT]], [[SRC2]], 32, 47, 0
 ; CHECK: br %r14
 ;
-; CHECK-SHIFT1: f6:
+; CHECK-SHIFT1-LABEL: f6:
 ; CHECK-SHIFT1: br %r14
-; CHECK-SHIFT2: f6:
+; CHECK-SHIFT2-LABEL: f6:
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw max i16 *%src, i16 32766 seq_cst
   ret i16 %res
@@ -194,15 +194,15 @@ define i16 @f6(i16 *%src) {
 ; Check the lowest useful unsigned maximum value.  We need to load 0x00010000
 ; into the source register.
 define i16 @f7(i16 *%src) {
-; CHECK: f7:
+; CHECK-LABEL: f7:
 ; CHECK: llilh [[SRC2:%r[0-9]+]], 1
 ; CHECK: clr [[ROT:%r[0-9]+]], [[SRC2]]
 ; CHECK: risbg [[ROT]], [[SRC2]], 32, 47, 0
 ; CHECK: br %r14
 ;
-; CHECK-SHIFT1: f7:
+; CHECK-SHIFT1-LABEL: f7:
 ; CHECK-SHIFT1: br %r14
-; CHECK-SHIFT2: f7:
+; CHECK-SHIFT2-LABEL: f7:
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw umin i16 *%src, i16 1 seq_cst
   ret i16 %res
@@ -211,15 +211,15 @@ define i16 @f7(i16 *%src) {
 ; Check the highest useful unsigned maximum value.  We need to load 0xfffe0000
 ; into the source register.
 define i16 @f8(i16 *%src) {
-; CHECK: f8:
+; CHECK-LABEL: f8:
 ; CHECK: llilh [[SRC2:%r[0-9]+]], 65534
 ; CHECK: clr [[ROT:%r[0-9]+]], [[SRC2]]
 ; CHECK: risbg [[ROT]], [[SRC2]], 32, 47, 0
 ; CHECK: br %r14
 ;
-; CHECK-SHIFT1: f8:
+; CHECK-SHIFT1-LABEL: f8:
 ; CHECK-SHIFT1: br %r14
-; CHECK-SHIFT2: f8:
+; CHECK-SHIFT2-LABEL: f8:
 ; CHECK-SHIFT2: br %r14
   %res = atomicrmw umax i16 *%src, i16 65534 seq_cst
   ret i16 %res