diff options
Diffstat (limited to 'llvm/test/CodeGen/SPARC/atomics.ll')
| -rw-r--r-- | llvm/test/CodeGen/SPARC/atomics.ll | 132 |
1 files changed, 130 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/SPARC/atomics.ll b/llvm/test/CodeGen/SPARC/atomics.ll index 6fe333a4be8..5e608e728c3 100644 --- a/llvm/test/CodeGen/SPARC/atomics.ll +++ b/llvm/test/CodeGen/SPARC/atomics.ll @@ -64,6 +64,90 @@ entry: ret i64 %2 } +;; TODO: the "move %icc" and related instructions are totally +;; redundant here. There's something weird happening in optimization +;; of the success value of cmpxchg. + +; CHECK-LABEL: test_cmpxchg_i8 +; CHECK: and %o1, -4, %o2 +; CHECK: mov 3, %o3 +; CHECK: andn %o3, %o1, %o1 +; CHECK: sll %o1, 3, %o1 +; CHECK: mov 255, %o3 +; CHECK: sll %o3, %o1, %o5 +; CHECK: xor %o5, -1, %o3 +; CHECK: mov 123, %o4 +; CHECK: ld [%o2], %g2 +; CHECK: sll %o4, %o1, %o4 +; CHECK: and %o0, 255, %o0 +; CHECK: sll %o0, %o1, %o0 +; CHECK: andn %g2, %o5, %g2 +; CHECK: sethi 0, %o5 +; CHECK: [[LABEL1:\.L.*]]: +; CHECK: or %g2, %o4, %g3 +; CHECK: or %g2, %o0, %g4 +; CHECK: cas [%o2], %g4, %g3 +; CHECK: cmp %g3, %g4 +; CHECK: mov %o5, %g4 +; CHECK: move %icc, 1, %g4 +; CHECK: cmp %g4, 0 +; CHECK: bne [[LABEL2:\.L.*]] +; CHECK: nop +; CHECK: and %g3, %o3, %g4 +; CHECK: cmp %g2, %g4 +; CHECK: bne [[LABEL1]] +; CHECK: mov %g4, %g2 +; CHECK: [[LABEL2]]: +; CHECK: retl +; CHECK: srl %g3, %o1, %o0 +define i8 @test_cmpxchg_i8(i8 %a, i8* %ptr) { +entry: + %pair = cmpxchg i8* %ptr, i8 %a, i8 123 monotonic monotonic + %b = extractvalue { i8, i1 } %pair, 0 + ret i8 %b +} + +; CHECK-LABEL: test_cmpxchg_i16 + +; CHECK: and %o1, -4, %o2 +; CHECK: and %o1, 3, %o1 +; CHECK: xor %o1, 2, %o1 +; CHECK: sll %o1, 3, %o1 +; CHECK: sethi 63, %o3 +; CHECK: or %o3, 1023, %o4 +; CHECK: sll %o4, %o1, %o5 +; CHECK: xor %o5, -1, %o3 +; CHECK: and %o0, %o4, %o4 +; CHECK: ld [%o2], %g2 +; CHECK: mov 123, %o0 +; CHECK: sll %o0, %o1, %o0 +; CHECK: sll %o4, %o1, %o4 +; CHECK: andn %g2, %o5, %g2 +; CHECK: sethi 0, %o5 +; CHECK: [[LABEL1:\.L.*]]: +; CHECK: or %g2, %o0, %g3 +; CHECK: or %g2, %o4, %g4 +; CHECK: cas [%o2], %g4, %g3 +; CHECK: cmp %g3, %g4 +; CHECK: mov %o5, %g4 +; CHECK: move %icc, 1, %g4 +; CHECK: cmp %g4, 0 +; CHECK: bne [[LABEL2:\.L.*]] +; CHECK: nop +; CHECK: and %g3, %o3, %g4 +; CHECK: cmp %g2, %g4 +; CHECK: bne [[LABEL1]] +; CHECK: mov %g4, %g2 +; CHECK: [[LABEL2]]: +; CHECK: retl +; CHECK: srl %g3, %o1, %o0 +define i16 @test_cmpxchg_i16(i16 %a, i16* %ptr) { +entry: + %pair = cmpxchg i16* %ptr, i16 %a, i16 123 monotonic monotonic + %b = extractvalue { i16, i1 } %pair, 0 + ret i16 %b +} + ; CHECK-LABEL: test_cmpxchg_i32 ; CHECK: mov 123, [[R:%[gilo][0-7]]] ; CHECK: cas [%o1], %o0, [[R]] @@ -86,6 +170,26 @@ entry: ret i64 %b } +; CHECK-LABEL: test_swap_i8 +; CHECK: mov 42, [[R:%[gilo][0-7]]] +; CHECK: cas + +define i8 @test_swap_i8(i8 %a, i8* %ptr) { +entry: + %b = atomicrmw xchg i8* %ptr, i8 42 monotonic + ret i8 %b +} + +; CHECK-LABEL: test_swap_i16 +; CHECK: mov 42, [[R:%[gilo][0-7]]] +; CHECK: cas + +define i16 @test_swap_i16(i16 %a, i16* %ptr) { +entry: + %b = atomicrmw xchg i16* %ptr, i16 42 monotonic + ret i16 %b +} + ; CHECK-LABEL: test_swap_i32 ; CHECK: mov 42, [[R:%[gilo][0-7]]] ; CHECK: swap [%o1], [[R]] @@ -105,12 +209,36 @@ entry: ret i64 %b } -; CHECK-LABEL: test_load_add_32 +; CHECK-LABEL: test_load_sub_i8 +; CHECK: membar +; CHECK: .L{{.*}}: +; CHECK: sub +; CHECK: cas [{{%[gilo][0-7]}}] +; CHECK: membar +define zeroext i8 @test_load_sub_i8(i8* %p, i8 zeroext %v) { +entry: + %0 = atomicrmw sub i8* %p, i8 %v seq_cst + ret i8 %0 +} + +; CHECK-LABEL: test_load_sub_i16 +; CHECK: membar +; CHECK: .L{{.*}}: +; CHECK: sub +; CHECK: cas [{{%[gilo][0-7]}}] +; CHECK: membar +define zeroext i16 @test_load_sub_i16(i16* %p, i16 zeroext %v) { +entry: + %0 = atomicrmw sub i16* %p, i16 %v seq_cst + ret i16 %0 +} + +; CHECK-LABEL: test_load_add_i32 ; CHECK: membar ; CHECK: add [[V:%[gilo][0-7]]], %o1, [[U:%[gilo][0-7]]] ; CHECK: cas [%o0], [[V]], [[U]] ; CHECK: membar -define zeroext i32 @test_load_add_32(i32* %p, i32 zeroext %v) { +define zeroext i32 @test_load_add_i32(i32* %p, i32 zeroext %v) { entry: %0 = atomicrmw add i32* %p, i32 %v seq_cst ret i32 %0 |
