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-rw-r--r--llvm/test/CodeGen/RISCV/subtarget-features-std-ext.ll11
1 files changed, 3 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/RISCV/subtarget-features-std-ext.ll b/llvm/test/CodeGen/RISCV/subtarget-features-std-ext.ll
index 613a983f926..8ed465ae85f 100644
--- a/llvm/test/CodeGen/RISCV/subtarget-features-std-ext.ll
+++ b/llvm/test/CodeGen/RISCV/subtarget-features-std-ext.ll
@@ -2,17 +2,12 @@
; RUN: | FileCheck -check-prefix=RV32IF-ILP32 %s
; RUN: llc -mtriple=riscv32 -target-abi ilp32f < %s 2>&1 \
; RUN: | FileCheck -check-prefix=RV32IF-ILP32F %s
-; RUN: llc -mtriple=riscv32 -mattr=-f -target-abi ilp32f <%s 2>&1 \
-; RUN: | FileCheck -check-prefix=RV32I-ILP32F-FAILED %s
-
-; RV32I-ILP32F-FAILED: Hard-float 'f' ABI can't be used for a target that doesn't support the F instruction set extension
+; RV32IF-ILP32F: Hard-float 'f' ABI can't be used for a target that doesn't support the F instruction set extension (ignoring target-abi)
define float @foo(i32 %a) nounwind #0 {
-; RV32IF-ILP32: fcvt.s.w ft0, a0
-; RV32IF-ILP32-NEXT: fmv.x.w a0, ft0
-; RV32IF-ILP32F: fcvt.s.w fa0, a0
-; RV32IF-ILP32F-NEXT: ret
+; RV32IF-ILP32: # %bb.0:
+; RV32IF-ILP32-NEXT: fcvt.s.w ft0, a0
%conv = sitofp i32 %a to float
ret float %conv
}
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