diff options
Diffstat (limited to 'llvm/test/CodeGen/RISCV/split-offsets.ll')
| -rw-r--r-- | llvm/test/CodeGen/RISCV/split-offsets.ll | 58 |
1 files changed, 29 insertions, 29 deletions
diff --git a/llvm/test/CodeGen/RISCV/split-offsets.ll b/llvm/test/CodeGen/RISCV/split-offsets.ll index 8642425344f..731f6cacd6a 100644 --- a/llvm/test/CodeGen/RISCV/split-offsets.ll +++ b/llvm/test/CodeGen/RISCV/split-offsets.ll @@ -11,33 +11,33 @@ define void @test1([65536 x i32]** %sp, [65536 x i32]* %t, i32 %n) { ; RV32I-LABEL: test1: ; RV32I: # %bb.0: # %entry -; RV32I-NEXT: lw a0, 0(a0) ; RV32I-NEXT: lui a2, 20 ; RV32I-NEXT: addi a2, a2, -1920 -; RV32I-NEXT: add a1, a1, a2 +; RV32I-NEXT: lw a0, 0(a0) ; RV32I-NEXT: add a0, a0, a2 -; RV32I-NEXT: addi a2, zero, 2 -; RV32I-NEXT: sw a2, 0(a0) ; RV32I-NEXT: addi a3, zero, 1 ; RV32I-NEXT: sw a3, 4(a0) -; RV32I-NEXT: sw a3, 0(a1) -; RV32I-NEXT: sw a2, 4(a1) +; RV32I-NEXT: addi a4, zero, 2 +; RV32I-NEXT: sw a4, 0(a0) +; RV32I-NEXT: add a0, a1, a2 +; RV32I-NEXT: sw a4, 4(a0) +; RV32I-NEXT: sw a3, 0(a0) ; RV32I-NEXT: .cfi_def_cfa_offset 0 ; RV32I-NEXT: ret ; ; RV64I-LABEL: test1: ; RV64I: # %bb.0: # %entry -; RV64I-NEXT: ld a0, 0(a0) ; RV64I-NEXT: lui a2, 20 ; RV64I-NEXT: addiw a2, a2, -1920 -; RV64I-NEXT: add a1, a1, a2 +; RV64I-NEXT: ld a0, 0(a0) ; RV64I-NEXT: add a0, a0, a2 -; RV64I-NEXT: addi a2, zero, 2 -; RV64I-NEXT: sw a2, 0(a0) ; RV64I-NEXT: addi a3, zero, 1 ; RV64I-NEXT: sw a3, 4(a0) -; RV64I-NEXT: sw a3, 0(a1) -; RV64I-NEXT: sw a2, 4(a1) +; RV64I-NEXT: addi a4, zero, 2 +; RV64I-NEXT: sw a4, 0(a0) +; RV64I-NEXT: add a0, a1, a2 +; RV64I-NEXT: sw a4, 4(a0) +; RV64I-NEXT: sw a3, 0(a0) ; RV64I-NEXT: .cfi_def_cfa_offset 0 ; RV64I-NEXT: ret entry: @@ -57,20 +57,20 @@ entry: define void @test2([65536 x i32]** %sp, [65536 x i32]* %t, i32 %n) { ; RV32I-LABEL: test2: ; RV32I: # %bb.0: # %entry +; RV32I-NEXT: lui a3, 20 +; RV32I-NEXT: addi a3, a3, -1920 +; RV32I-NEXT: lw a0, 0(a0) +; RV32I-NEXT: add a0, a0, a3 +; RV32I-NEXT: add a1, a1, a3 ; RV32I-NEXT: mv a3, zero -; RV32I-NEXT: lw a4, 0(a0) -; RV32I-NEXT: lui a0, 20 -; RV32I-NEXT: addi a5, a0, -1920 -; RV32I-NEXT: add a0, a1, a5 -; RV32I-NEXT: add a1, a4, a5 ; RV32I-NEXT: bge a3, a2, .LBB1_2 ; RV32I-NEXT: .LBB1_1: # %while_body ; RV32I-NEXT: # =>This Inner Loop Header: Depth=1 +; RV32I-NEXT: sw a3, 4(a0) ; RV32I-NEXT: addi a4, a3, 1 -; RV32I-NEXT: sw a4, 0(a1) -; RV32I-NEXT: sw a3, 4(a1) ; RV32I-NEXT: sw a4, 0(a0) -; RV32I-NEXT: sw a3, 4(a0) +; RV32I-NEXT: sw a3, 4(a1) +; RV32I-NEXT: sw a4, 0(a1) ; RV32I-NEXT: mv a3, a4 ; RV32I-NEXT: blt a3, a2, .LBB1_1 ; RV32I-NEXT: .LBB1_2: # %while_end @@ -79,22 +79,22 @@ define void @test2([65536 x i32]** %sp, [65536 x i32]* %t, i32 %n) { ; ; RV64I-LABEL: test2: ; RV64I: # %bb.0: # %entry -; RV64I-NEXT: mv a3, zero -; RV64I-NEXT: ld a4, 0(a0) -; RV64I-NEXT: lui a0, 20 -; RV64I-NEXT: addiw a5, a0, -1920 -; RV64I-NEXT: add a0, a1, a5 -; RV64I-NEXT: add a1, a4, a5 +; RV64I-NEXT: lui a3, 20 +; RV64I-NEXT: addiw a3, a3, -1920 +; RV64I-NEXT: ld a0, 0(a0) +; RV64I-NEXT: add a0, a0, a3 +; RV64I-NEXT: add a1, a1, a3 ; RV64I-NEXT: sext.w a2, a2 +; RV64I-NEXT: mv a3, zero ; RV64I-NEXT: sext.w a4, a3 ; RV64I-NEXT: bge a4, a2, .LBB1_2 ; RV64I-NEXT: .LBB1_1: # %while_body ; RV64I-NEXT: # =>This Inner Loop Header: Depth=1 +; RV64I-NEXT: sw a3, 4(a0) ; RV64I-NEXT: addi a4, a3, 1 -; RV64I-NEXT: sw a4, 0(a1) -; RV64I-NEXT: sw a3, 4(a1) ; RV64I-NEXT: sw a4, 0(a0) -; RV64I-NEXT: sw a3, 4(a0) +; RV64I-NEXT: sw a3, 4(a1) +; RV64I-NEXT: sw a4, 0(a1) ; RV64I-NEXT: mv a3, a4 ; RV64I-NEXT: sext.w a4, a3 ; RV64I-NEXT: blt a4, a2, .LBB1_1 |
