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-rw-r--r--llvm/test/CodeGen/RISCV/select-cc.ll7
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/RISCV/select-cc.ll b/llvm/test/CodeGen/RISCV/select-cc.ll
index ddc5983525e..2a9a0080e4c 100644
--- a/llvm/test/CodeGen/RISCV/select-cc.ll
+++ b/llvm/test/CodeGen/RISCV/select-cc.ll
@@ -5,6 +5,10 @@
define i32 @foo(i32 %a, i32 *%b) {
; RV32I-LABEL: foo:
; RV32I: # %bb.0:
+; RV32I-NEXT: addi sp, sp, -16
+; RV32I-NEXT: sw ra, 12(sp)
+; RV32I-NEXT: sw s0, 8(sp)
+; RV32I-NEXT: addi s0, sp, 16
; RV32I-NEXT: lw a2, 0(a1)
; RV32I-NEXT: beq a0, a2, .LBB0_2
; RV32I-NEXT: # %bb.1:
@@ -55,6 +59,9 @@ define i32 @foo(i32 %a, i32 *%b) {
; RV32I-NEXT: # %bb.19:
; RV32I-NEXT: addi a0, a1, 0
; RV32I-NEXT: .LBB0_20:
+; RV32I-NEXT: lw s0, 8(sp)
+; RV32I-NEXT: lw ra, 12(sp)
+; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: jalr zero, ra, 0
%val1 = load volatile i32, i32* %b
%tst1 = icmp eq i32 %a, %val1
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