1 files changed, 18 insertions, 18 deletions
diff --git a/llvm/test/CodeGen/RISCV/rv64i-w-insts-legalization.ll b/llvm/test/CodeGen/RISCV/rv64i-w-insts-legalization.ll
index c4a4de7681b..8b177469fe5 100644
--- a/llvm/test/CodeGen/RISCV/rv64i-w-insts-legalization.ll
+++ b/llvm/test/CodeGen/RISCV/rv64i-w-insts-legalization.ll
@@ -8,17 +8,17 @@ define signext i32 @addw(i32 signext %s, i32 signext %n, i32 signext %k) nounwin
 ; CHECK-NEXT:  # %bb.1: # %for.body.preheader
 ; CHECK-NEXT:    not a2, a0
 ; CHECK-NEXT:    add a2, a2, a1
-; CHECK-NEXT:    addi a3, a0, 1
-; CHECK-NEXT:    mul a3, a2, a3
-; CHECK-NEXT:    slli a2, a2, 32
-; CHECK-NEXT:    srli a2, a2, 32
 ; CHECK-NEXT:    sub a1, a1, a0
 ; CHECK-NEXT:    addi a1, a1, -2
 ; CHECK-NEXT:    slli a1, a1, 32
 ; CHECK-NEXT:    srli a1, a1, 32
-; CHECK-NEXT:    mul a1, a2, a1
+; CHECK-NEXT:    slli a3, a2, 32
+; CHECK-NEXT:    srli a3, a3, 32
+; CHECK-NEXT:    mul a1, a3, a1
+; CHECK-NEXT:    addi a3, a0, 1
+; CHECK-NEXT:    mul a2, a2, a3
+; CHECK-NEXT:    add a0, a2, a0
 ; CHECK-NEXT:    srli a1, a1, 1
-; CHECK-NEXT:    add a0, a3, a0
 ; CHECK-NEXT:    addw a0, a0, a1
 ; CHECK-NEXT:    ret
 ; CHECK-NEXT:  .LBB0_2:
@@ -54,18 +54,18 @@ define signext i32 @subw(i32 signext %s, i32 signext %n, i32 signext %k) nounwin
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    bge a0, a1, .LBB1_2
 ; CHECK-NEXT:  # %bb.1: # %for.body.preheader
-; CHECK-NEXT:    not a2, a0
-; CHECK-NEXT:    add a3, a2, a1
-; CHECK-NEXT:    mul a2, a3, a2
-; CHECK-NEXT:    slli a3, a3, 32
-; CHECK-NEXT:    srli a3, a3, 32
-; CHECK-NEXT:    sub a1, a1, a0
-; CHECK-NEXT:    addi a1, a1, -2
-; CHECK-NEXT:    slli a1, a1, 32
-; CHECK-NEXT:    srli a1, a1, 32
-; CHECK-NEXT:    mul a1, a3, a1
-; CHECK-NEXT:    srli a1, a1, 1
-; CHECK-NEXT:    sub a0, a2, a0
+; CHECK-NEXT:    sub a2, a1, a0
+; CHECK-NEXT:    addi a2, a2, -2
+; CHECK-NEXT:    slli a2, a2, 32
+; CHECK-NEXT:    srli a2, a2, 32
+; CHECK-NEXT:    not a3, a0
+; CHECK-NEXT:    add a1, a3, a1
+; CHECK-NEXT:    slli a4, a1, 32
+; CHECK-NEXT:    srli a4, a4, 32
+; CHECK-NEXT:    mul a2, a4, a2
+; CHECK-NEXT:    mul a1, a1, a3
+; CHECK-NEXT:    sub a0, a1, a0
+; CHECK-NEXT:    srli a1, a2, 1
 ; CHECK-NEXT:    subw a0, a0, a1
 ; CHECK-NEXT:    ret
 ; CHECK-NEXT:  .LBB1_2: