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-rw-r--r--llvm/test/CodeGen/RISCV/float-fcmp.ll32
1 files changed, 16 insertions, 16 deletions
diff --git a/llvm/test/CodeGen/RISCV/float-fcmp.ll b/llvm/test/CodeGen/RISCV/float-fcmp.ll
index 3a44020a2fd..43a849bee36 100644
--- a/llvm/test/CodeGen/RISCV/float-fcmp.ll
+++ b/llvm/test/CodeGen/RISCV/float-fcmp.ll
@@ -146,20 +146,20 @@ define i32 @fcmp_one(float %a, float %b) nounwind {
define i32 @fcmp_ord(float %a, float %b) nounwind {
; RV32IF-LABEL: fcmp_ord:
; RV32IF: # %bb.0:
-; RV32IF-NEXT: fmv.w.x ft0, a0
-; RV32IF-NEXT: fmv.w.x ft1, a1
-; RV32IF-NEXT: feq.s a0, ft1, ft1
+; RV32IF-NEXT: fmv.w.x ft0, a1
; RV32IF-NEXT: feq.s a1, ft0, ft0
-; RV32IF-NEXT: and a0, a1, a0
+; RV32IF-NEXT: fmv.w.x ft0, a0
+; RV32IF-NEXT: feq.s a0, ft0, ft0
+; RV32IF-NEXT: and a0, a0, a1
; RV32IF-NEXT: ret
;
; RV64IF-LABEL: fcmp_ord:
; RV64IF: # %bb.0:
-; RV64IF-NEXT: fmv.w.x ft0, a0
-; RV64IF-NEXT: fmv.w.x ft1, a1
-; RV64IF-NEXT: feq.s a0, ft1, ft1
+; RV64IF-NEXT: fmv.w.x ft0, a1
; RV64IF-NEXT: feq.s a1, ft0, ft0
-; RV64IF-NEXT: and a0, a1, a0
+; RV64IF-NEXT: fmv.w.x ft0, a0
+; RV64IF-NEXT: feq.s a0, ft0, ft0
+; RV64IF-NEXT: and a0, a0, a1
; RV64IF-NEXT: ret
%1 = fcmp ord float %a, %b
%2 = zext i1 %1 to i32
@@ -303,21 +303,21 @@ define i32 @fcmp_une(float %a, float %b) nounwind {
define i32 @fcmp_uno(float %a, float %b) nounwind {
; RV32IF-LABEL: fcmp_uno:
; RV32IF: # %bb.0:
-; RV32IF-NEXT: fmv.w.x ft0, a0
-; RV32IF-NEXT: fmv.w.x ft1, a1
-; RV32IF-NEXT: feq.s a0, ft1, ft1
+; RV32IF-NEXT: fmv.w.x ft0, a1
; RV32IF-NEXT: feq.s a1, ft0, ft0
-; RV32IF-NEXT: and a0, a1, a0
+; RV32IF-NEXT: fmv.w.x ft0, a0
+; RV32IF-NEXT: feq.s a0, ft0, ft0
+; RV32IF-NEXT: and a0, a0, a1
; RV32IF-NEXT: seqz a0, a0
; RV32IF-NEXT: ret
;
; RV64IF-LABEL: fcmp_uno:
; RV64IF: # %bb.0:
-; RV64IF-NEXT: fmv.w.x ft0, a0
-; RV64IF-NEXT: fmv.w.x ft1, a1
-; RV64IF-NEXT: feq.s a0, ft1, ft1
+; RV64IF-NEXT: fmv.w.x ft0, a1
; RV64IF-NEXT: feq.s a1, ft0, ft0
-; RV64IF-NEXT: and a0, a1, a0
+; RV64IF-NEXT: fmv.w.x ft0, a0
+; RV64IF-NEXT: feq.s a0, ft0, ft0
+; RV64IF-NEXT: and a0, a0, a1
; RV64IF-NEXT: seqz a0, a0
; RV64IF-NEXT: ret
%1 = fcmp uno float %a, %b
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