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-rw-r--r--llvm/test/CodeGen/RISCV/fixups-relax-diff.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/RISCV/fixups-relax-diff.ll b/llvm/test/CodeGen/RISCV/fixups-relax-diff.ll
index e52c960b915..0fa7998dae0 100644
--- a/llvm/test/CodeGen/RISCV/fixups-relax-diff.ll
+++ b/llvm/test/CodeGen/RISCV/fixups-relax-diff.ll
@@ -14,7 +14,7 @@ entry:
store i32 0, i32* %retval, align 4
; RELAX: R_RISCV_ADD64 b
; RELAX: R_RISCV_SUB64 a
- ; NORELAX-NOT: R_RISCV
+ ; NORELAX-NOT: R_RISCV_ADD
call void asm sideeffect "a:\0Ab:\0A.dword b-a", ""()
ret i32 0
}
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