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Diffstat (limited to 'llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll')
-rw-r--r--llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll144
1 files changed, 72 insertions, 72 deletions
diff --git a/llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll b/llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
index 5ad002f5c42..37dfa7bf9c8 100644
--- a/llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
+++ b/llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
@@ -38,9 +38,9 @@ define i32 @caller_double_in_fpr() nounwind {
define i32 @callee_double_in_fpr_exhausted_gprs(i64 %a, i64 %b, i64 %c, i64 %d, i32 %e, double %f) nounwind {
; RV32-ILP32D-LABEL: callee_double_in_fpr_exhausted_gprs:
; RV32-ILP32D: # %bb.0:
-; RV32-ILP32D-NEXT: lw a0, 0(sp)
-; RV32-ILP32D-NEXT: fcvt.w.d a1, fa0, rtz
-; RV32-ILP32D-NEXT: add a0, a0, a1
+; RV32-ILP32D-NEXT: fcvt.w.d a0, fa0, rtz
+; RV32-ILP32D-NEXT: lw a1, 0(sp)
+; RV32-ILP32D-NEXT: add a0, a1, a0
; RV32-ILP32D-NEXT: ret
%f_fptosi = fptosi double %f to i32
%1 = add i32 %e, %f_fptosi
@@ -52,18 +52,18 @@ define i32 @caller_double_in_fpr_exhausted_gprs() nounwind {
; RV32-ILP32D: # %bb.0:
; RV32-ILP32D-NEXT: addi sp, sp, -16
; RV32-ILP32D-NEXT: sw ra, 12(sp)
-; RV32-ILP32D-NEXT: addi a1, zero, 5
+; RV32-ILP32D-NEXT: addi a0, zero, 5
+; RV32-ILP32D-NEXT: sw a0, 0(sp)
; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI3_0)
; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI3_0)
; RV32-ILP32D-NEXT: fld fa0, 0(a0)
; RV32-ILP32D-NEXT: addi a0, zero, 1
-; RV32-ILP32D-NEXT: addi a2, zero, 2
-; RV32-ILP32D-NEXT: addi a4, zero, 3
-; RV32-ILP32D-NEXT: addi a6, zero, 4
-; RV32-ILP32D-NEXT: sw a1, 0(sp)
; RV32-ILP32D-NEXT: mv a1, zero
+; RV32-ILP32D-NEXT: addi a2, zero, 2
; RV32-ILP32D-NEXT: mv a3, zero
+; RV32-ILP32D-NEXT: addi a4, zero, 3
; RV32-ILP32D-NEXT: mv a5, zero
+; RV32-ILP32D-NEXT: addi a6, zero, 4
; RV32-ILP32D-NEXT: mv a7, zero
; RV32-ILP32D-NEXT: call callee_double_in_fpr_exhausted_gprs
; RV32-ILP32D-NEXT: lw ra, 12(sp)
@@ -82,9 +82,9 @@ define i32 @callee_double_in_gpr_exhausted_fprs(double %a, double %b, double %c,
; RV32-ILP32D-NEXT: sw a0, 8(sp)
; RV32-ILP32D-NEXT: sw a1, 12(sp)
; RV32-ILP32D-NEXT: fld ft0, 8(sp)
-; RV32-ILP32D-NEXT: fcvt.w.d a0, fa7, rtz
-; RV32-ILP32D-NEXT: fcvt.w.d a1, ft0, rtz
-; RV32-ILP32D-NEXT: add a0, a0, a1
+; RV32-ILP32D-NEXT: fcvt.w.d a0, ft0, rtz
+; RV32-ILP32D-NEXT: fcvt.w.d a1, fa7, rtz
+; RV32-ILP32D-NEXT: add a0, a1, a0
; RV32-ILP32D-NEXT: addi sp, sp, 16
; RV32-ILP32D-NEXT: ret
%h_fptosi = fptosi double %h to i32
@@ -100,21 +100,21 @@ define i32 @caller_double_in_gpr_exhausted_fprs() nounwind {
; RV32-ILP32D-NEXT: sw ra, 12(sp)
; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI5_0)
; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI5_0)
-; RV32-ILP32D-NEXT: fld fa0, 0(a0)
-; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI5_1)
-; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI5_1)
-; RV32-ILP32D-NEXT: fld fa1, 0(a0)
-; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI5_2)
-; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI5_2)
-; RV32-ILP32D-NEXT: fld fa2, 0(a0)
-; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI5_3)
-; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI5_3)
-; RV32-ILP32D-NEXT: fld fa3, 0(a0)
-; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI5_4)
-; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI5_4)
-; RV32-ILP32D-NEXT: fld fa4, 0(a0)
-; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI5_5)
-; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI5_5)
+; RV32-ILP32D-NEXT: lui a1, %hi(.LCPI5_1)
+; RV32-ILP32D-NEXT: addi a1, a1, %lo(.LCPI5_1)
+; RV32-ILP32D-NEXT: lui a2, %hi(.LCPI5_2)
+; RV32-ILP32D-NEXT: addi a2, a2, %lo(.LCPI5_2)
+; RV32-ILP32D-NEXT: lui a3, %hi(.LCPI5_3)
+; RV32-ILP32D-NEXT: addi a3, a3, %lo(.LCPI5_3)
+; RV32-ILP32D-NEXT: lui a4, %hi(.LCPI5_4)
+; RV32-ILP32D-NEXT: addi a4, a4, %lo(.LCPI5_4)
+; RV32-ILP32D-NEXT: lui a5, %hi(.LCPI5_5)
+; RV32-ILP32D-NEXT: addi a5, a5, %lo(.LCPI5_5)
+; RV32-ILP32D-NEXT: fld fa0, 0(a5)
+; RV32-ILP32D-NEXT: fld fa1, 0(a4)
+; RV32-ILP32D-NEXT: fld fa2, 0(a3)
+; RV32-ILP32D-NEXT: fld fa3, 0(a2)
+; RV32-ILP32D-NEXT: fld fa4, 0(a1)
; RV32-ILP32D-NEXT: fld fa5, 0(a0)
; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI5_6)
; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI5_6)
@@ -122,8 +122,8 @@ define i32 @caller_double_in_gpr_exhausted_fprs() nounwind {
; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI5_7)
; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI5_7)
; RV32-ILP32D-NEXT: fld fa7, 0(a0)
-; RV32-ILP32D-NEXT: lui a1, 262688
; RV32-ILP32D-NEXT: mv a0, zero
+; RV32-ILP32D-NEXT: lui a1, 262688
; RV32-ILP32D-NEXT: call callee_double_in_gpr_exhausted_fprs
; RV32-ILP32D-NEXT: lw ra, 12(sp)
; RV32-ILP32D-NEXT: addi sp, sp, 16
@@ -157,39 +157,39 @@ define i32 @caller_double_in_gpr_and_stack_almost_exhausted_gprs_fprs() nounwind
; RV32-ILP32D: # %bb.0:
; RV32-ILP32D-NEXT: addi sp, sp, -16
; RV32-ILP32D-NEXT: sw ra, 12(sp)
-; RV32-ILP32D-NEXT: lui a1, 262816
+; RV32-ILP32D-NEXT: lui a0, 262816
+; RV32-ILP32D-NEXT: sw a0, 0(sp)
; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI7_0)
-; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI7_0)
-; RV32-ILP32D-NEXT: fld fa0, 0(a0)
-; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI7_1)
-; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI7_1)
-; RV32-ILP32D-NEXT: fld fa1, 0(a0)
-; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI7_2)
-; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI7_2)
-; RV32-ILP32D-NEXT: fld fa2, 0(a0)
-; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI7_3)
-; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI7_3)
-; RV32-ILP32D-NEXT: fld fa3, 0(a0)
-; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI7_4)
-; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI7_4)
-; RV32-ILP32D-NEXT: fld fa4, 0(a0)
-; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI7_5)
-; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI7_5)
-; RV32-ILP32D-NEXT: fld fa5, 0(a0)
+; RV32-ILP32D-NEXT: addi a6, a0, %lo(.LCPI7_0)
+; RV32-ILP32D-NEXT: lui a1, %hi(.LCPI7_1)
+; RV32-ILP32D-NEXT: addi a1, a1, %lo(.LCPI7_1)
+; RV32-ILP32D-NEXT: lui a2, %hi(.LCPI7_2)
+; RV32-ILP32D-NEXT: addi a2, a2, %lo(.LCPI7_2)
+; RV32-ILP32D-NEXT: lui a3, %hi(.LCPI7_3)
+; RV32-ILP32D-NEXT: addi a3, a3, %lo(.LCPI7_3)
+; RV32-ILP32D-NEXT: lui a4, %hi(.LCPI7_4)
+; RV32-ILP32D-NEXT: addi a4, a4, %lo(.LCPI7_4)
+; RV32-ILP32D-NEXT: lui a5, %hi(.LCPI7_5)
+; RV32-ILP32D-NEXT: addi a5, a5, %lo(.LCPI7_5)
; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI7_6)
; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI7_6)
-; RV32-ILP32D-NEXT: fld fa6, 0(a0)
+; RV32-ILP32D-NEXT: fld fa0, 0(a0)
+; RV32-ILP32D-NEXT: fld fa1, 0(a5)
+; RV32-ILP32D-NEXT: fld fa2, 0(a4)
+; RV32-ILP32D-NEXT: fld fa3, 0(a3)
+; RV32-ILP32D-NEXT: fld fa4, 0(a2)
+; RV32-ILP32D-NEXT: fld fa5, 0(a1)
+; RV32-ILP32D-NEXT: fld fa6, 0(a6)
; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI7_7)
; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI7_7)
; RV32-ILP32D-NEXT: fld fa7, 0(a0)
; RV32-ILP32D-NEXT: addi a0, zero, 1
-; RV32-ILP32D-NEXT: addi a2, zero, 3
-; RV32-ILP32D-NEXT: addi a4, zero, 5
-; RV32-ILP32D-NEXT: addi a6, zero, 7
-; RV32-ILP32D-NEXT: sw a1, 0(sp)
; RV32-ILP32D-NEXT: mv a1, zero
+; RV32-ILP32D-NEXT: addi a2, zero, 3
; RV32-ILP32D-NEXT: mv a3, zero
+; RV32-ILP32D-NEXT: addi a4, zero, 5
; RV32-ILP32D-NEXT: mv a5, zero
+; RV32-ILP32D-NEXT: addi a6, zero, 7
; RV32-ILP32D-NEXT: mv a7, zero
; RV32-ILP32D-NEXT: call callee_double_in_gpr_and_stack_almost_exhausted_gprs_fprs
; RV32-ILP32D-NEXT: lw ra, 12(sp)
@@ -223,38 +223,38 @@ define i32 @caller_double_on_stack_exhausted_gprs_fprs() nounwind {
; RV32-ILP32D-NEXT: sw ra, 12(sp)
; RV32-ILP32D-NEXT: lui a0, 262816
; RV32-ILP32D-NEXT: sw a0, 4(sp)
+; RV32-ILP32D-NEXT: sw zero, 0(sp)
; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI9_0)
-; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI9_0)
-; RV32-ILP32D-NEXT: fld fa0, 0(a0)
-; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI9_1)
-; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI9_1)
-; RV32-ILP32D-NEXT: fld fa1, 0(a0)
-; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI9_2)
-; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI9_2)
-; RV32-ILP32D-NEXT: fld fa2, 0(a0)
-; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI9_3)
-; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI9_3)
-; RV32-ILP32D-NEXT: fld fa3, 0(a0)
-; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI9_4)
-; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI9_4)
-; RV32-ILP32D-NEXT: fld fa4, 0(a0)
-; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI9_5)
-; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI9_5)
-; RV32-ILP32D-NEXT: fld fa5, 0(a0)
+; RV32-ILP32D-NEXT: addi a6, a0, %lo(.LCPI9_0)
+; RV32-ILP32D-NEXT: lui a1, %hi(.LCPI9_1)
+; RV32-ILP32D-NEXT: addi a1, a1, %lo(.LCPI9_1)
+; RV32-ILP32D-NEXT: lui a2, %hi(.LCPI9_2)
+; RV32-ILP32D-NEXT: addi a2, a2, %lo(.LCPI9_2)
+; RV32-ILP32D-NEXT: lui a3, %hi(.LCPI9_3)
+; RV32-ILP32D-NEXT: addi a3, a3, %lo(.LCPI9_3)
+; RV32-ILP32D-NEXT: lui a4, %hi(.LCPI9_4)
+; RV32-ILP32D-NEXT: addi a4, a4, %lo(.LCPI9_4)
+; RV32-ILP32D-NEXT: lui a5, %hi(.LCPI9_5)
+; RV32-ILP32D-NEXT: addi a5, a5, %lo(.LCPI9_5)
; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI9_6)
; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI9_6)
-; RV32-ILP32D-NEXT: fld fa6, 0(a0)
+; RV32-ILP32D-NEXT: fld fa0, 0(a0)
+; RV32-ILP32D-NEXT: fld fa1, 0(a5)
+; RV32-ILP32D-NEXT: fld fa2, 0(a4)
+; RV32-ILP32D-NEXT: fld fa3, 0(a3)
+; RV32-ILP32D-NEXT: fld fa4, 0(a2)
+; RV32-ILP32D-NEXT: fld fa5, 0(a1)
+; RV32-ILP32D-NEXT: fld fa6, 0(a6)
; RV32-ILP32D-NEXT: lui a0, %hi(.LCPI9_7)
; RV32-ILP32D-NEXT: addi a0, a0, %lo(.LCPI9_7)
; RV32-ILP32D-NEXT: fld fa7, 0(a0)
; RV32-ILP32D-NEXT: addi a0, zero, 1
-; RV32-ILP32D-NEXT: addi a2, zero, 3
-; RV32-ILP32D-NEXT: addi a4, zero, 5
-; RV32-ILP32D-NEXT: addi a6, zero, 7
-; RV32-ILP32D-NEXT: sw zero, 0(sp)
; RV32-ILP32D-NEXT: mv a1, zero
+; RV32-ILP32D-NEXT: addi a2, zero, 3
; RV32-ILP32D-NEXT: mv a3, zero
+; RV32-ILP32D-NEXT: addi a4, zero, 5
; RV32-ILP32D-NEXT: mv a5, zero
+; RV32-ILP32D-NEXT: addi a6, zero, 7
; RV32-ILP32D-NEXT: mv a7, zero
; RV32-ILP32D-NEXT: call callee_double_on_stack_exhausted_gprs_fprs
; RV32-ILP32D-NEXT: lw ra, 12(sp)
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