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-rw-r--r--llvm/test/CodeGen/RISCV/callee-saved-gprs.ll117
1 files changed, 50 insertions, 67 deletions
diff --git a/llvm/test/CodeGen/RISCV/callee-saved-gprs.ll b/llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
index 3cfb58d1edc..ad8f5a361be 100644
--- a/llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
+++ b/llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
@@ -41,9 +41,7 @@ define void @callee() nounwind {
; RV32I-NEXT: sw s10, 36(sp)
; RV32I-NEXT: sw s11, 32(sp)
; RV32I-NEXT: lui a0, %hi(var)
-; RV32I-NEXT: lw a1, %lo(var)(a0)
-; RV32I-NEXT: sw a1, 28(sp)
-; RV32I-NEXT: addi a2, a0, %lo(var)
+; RV32I-NEXT: addi a1, a0, %lo(var)
;
; RV32I-WITH-FP-LABEL: callee:
; RV32I-WITH-FP: # %bb.0:
@@ -63,9 +61,7 @@ define void @callee() nounwind {
; RV32I-WITH-FP-NEXT: sw s11, 28(sp)
; RV32I-WITH-FP-NEXT: addi s0, sp, 80
; RV32I-WITH-FP-NEXT: lui a0, %hi(var)
-; RV32I-WITH-FP-NEXT: lw a1, %lo(var)(a0)
-; RV32I-WITH-FP-NEXT: sw a1, -56(s0)
-; RV32I-WITH-FP-NEXT: addi a2, a0, %lo(var)
+; RV32I-WITH-FP-NEXT: addi a1, a0, %lo(var)
;
; RV64I-LABEL: callee:
; RV64I: # %bb.0:
@@ -83,9 +79,7 @@ define void @callee() nounwind {
; RV64I-NEXT: sd s10, 56(sp)
; RV64I-NEXT: sd s11, 48(sp)
; RV64I-NEXT: lui a0, %hi(var)
-; RV64I-NEXT: lw a1, %lo(var)(a0)
-; RV64I-NEXT: sd a1, 40(sp)
-; RV64I-NEXT: addi a2, a0, %lo(var)
+; RV64I-NEXT: addi a1, a0, %lo(var)
;
; RV64I-WITH-FP-LABEL: callee:
; RV64I-WITH-FP: # %bb.0:
@@ -105,9 +99,7 @@ define void @callee() nounwind {
; RV64I-WITH-FP-NEXT: sd s11, 56(sp)
; RV64I-WITH-FP-NEXT: addi s0, sp, 160
; RV64I-WITH-FP-NEXT: lui a0, %hi(var)
-; RV64I-WITH-FP-NEXT: lw a1, %lo(var)(a0)
-; RV64I-WITH-FP-NEXT: sd a1, -112(s0)
-; RV64I-WITH-FP-NEXT: addi a2, a0, %lo(var)
+; RV64I-WITH-FP-NEXT: addi a1, a0, %lo(var)
%val = load [32 x i32], [32 x i32]* @var
store volatile [32 x i32] %val, [32 x i32]* @var
ret void
@@ -119,41 +111,36 @@ define void @callee() nounwind {
define void @caller() nounwind {
; RV32I-LABEL: caller:
; RV32I: lui a0, %hi(var)
-; RV32I-NEXT: lw a1, %lo(var)(a0)
-; RV32I-NEXT: sw a1, 88(sp)
-; RV32I-NEXT: addi s0, a0, %lo(var)
-
+; RV32I-NEXT: addi s1, a0, %lo(var)
; RV32I: sw a0, 8(sp)
-; RV32I-NEXT: lw s2, 84(s0)
-; RV32I-NEXT: lw s3, 88(s0)
-; RV32I-NEXT: lw s4, 92(s0)
-; RV32I-NEXT: lw s5, 96(s0)
-; RV32I-NEXT: lw s6, 100(s0)
-; RV32I-NEXT: lw s7, 104(s0)
-; RV32I-NEXT: lw s8, 108(s0)
-; RV32I-NEXT: lw s9, 112(s0)
-; RV32I-NEXT: lw s10, 116(s0)
-; RV32I-NEXT: lw s11, 120(s0)
-; RV32I-NEXT: lw s1, 124(s0)
+; RV32I-NEXT: lw s2, 84(s1)
+; RV32I-NEXT: lw s3, 88(s1)
+; RV32I-NEXT: lw s4, 92(s1)
+; RV32I-NEXT: lw s5, 96(s1)
+; RV32I-NEXT: lw s6, 100(s1)
+; RV32I-NEXT: lw s7, 104(s1)
+; RV32I-NEXT: lw s8, 108(s1)
+; RV32I-NEXT: lw s9, 112(s1)
+; RV32I-NEXT: lw s10, 116(s1)
+; RV32I-NEXT: lw s11, 120(s1)
+; RV32I-NEXT: lw s0, 124(s1)
; RV32I-NEXT: call callee
-; RV32I-NEXT: sw s1, 124(s0)
-; RV32I-NEXT: sw s11, 120(s0)
-; RV32I-NEXT: sw s10, 116(s0)
-; RV32I-NEXT: sw s9, 112(s0)
-; RV32I-NEXT: sw s8, 108(s0)
-; RV32I-NEXT: sw s7, 104(s0)
-; RV32I-NEXT: sw s6, 100(s0)
-; RV32I-NEXT: sw s5, 96(s0)
-; RV32I-NEXT: sw s4, 92(s0)
-; RV32I-NEXT: sw s3, 88(s0)
-; RV32I-NEXT: sw s2, 84(s0)
+; RV32I-NEXT: sw s0, 124(s1)
+; RV32I-NEXT: sw s11, 120(s1)
+; RV32I-NEXT: sw s10, 116(s1)
+; RV32I-NEXT: sw s9, 112(s1)
+; RV32I-NEXT: sw s8, 108(s1)
+; RV32I-NEXT: sw s7, 104(s1)
+; RV32I-NEXT: sw s6, 100(s1)
+; RV32I-NEXT: sw s5, 96(s1)
+; RV32I-NEXT: sw s4, 92(s1)
+; RV32I-NEXT: sw s3, 88(s1)
+; RV32I-NEXT: sw s2, 84(s1)
; RV32I-NEXT: lw a0, 8(sp)
;
; RV32I-WITH-FP-LABEL: caller:
; RV32I-WITH-FP: addi s0, sp, 144
; RV32I-WITH-FP-NEXT: lui a0, %hi(var)
-; RV32I-WITH-FP-NEXT: lw a1, %lo(var)(a0)
-; RV32I-WITH-FP-NEXT: sw a1, -56(s0)
; RV32I-WITH-FP-NEXT: addi s1, a0, %lo(var)
; RV32I-WITH-FP: sw a0, -140(s0)
; RV32I-WITH-FP-NEXT: lw s5, 88(s1)
@@ -181,40 +168,36 @@ define void @caller() nounwind {
;
; RV64I-LABEL: caller:
; RV64I: lui a0, %hi(var)
-; RV64I-NEXT: lw a1, %lo(var)(a0)
-; RV64I-NEXT: sd a1, 160(sp)
-; RV64I-NEXT: addi s0, a0, %lo(var)
+; RV64I-NEXT: addi s1, a0, %lo(var)
; RV64I: sd a0, 0(sp)
-; RV64I-NEXT: lw s2, 84(s0)
-; RV64I-NEXT: lw s3, 88(s0)
-; RV64I-NEXT: lw s4, 92(s0)
-; RV64I-NEXT: lw s5, 96(s0)
-; RV64I-NEXT: lw s6, 100(s0)
-; RV64I-NEXT: lw s7, 104(s0)
-; RV64I-NEXT: lw s8, 108(s0)
-; RV64I-NEXT: lw s9, 112(s0)
-; RV64I-NEXT: lw s10, 116(s0)
-; RV64I-NEXT: lw s11, 120(s0)
-; RV64I-NEXT: lw s1, 124(s0)
+; RV64I-NEXT: lw s2, 84(s1)
+; RV64I-NEXT: lw s3, 88(s1)
+; RV64I-NEXT: lw s4, 92(s1)
+; RV64I-NEXT: lw s5, 96(s1)
+; RV64I-NEXT: lw s6, 100(s1)
+; RV64I-NEXT: lw s7, 104(s1)
+; RV64I-NEXT: lw s8, 108(s1)
+; RV64I-NEXT: lw s9, 112(s1)
+; RV64I-NEXT: lw s10, 116(s1)
+; RV64I-NEXT: lw s11, 120(s1)
+; RV64I-NEXT: lw s0, 124(s1)
; RV64I-NEXT: call callee
-; RV64I-NEXT: sw s1, 124(s0)
-; RV64I-NEXT: sw s11, 120(s0)
-; RV64I-NEXT: sw s10, 116(s0)
-; RV64I-NEXT: sw s9, 112(s0)
-; RV64I-NEXT: sw s8, 108(s0)
-; RV64I-NEXT: sw s7, 104(s0)
-; RV64I-NEXT: sw s6, 100(s0)
-; RV64I-NEXT: sw s5, 96(s0)
-; RV64I-NEXT: sw s4, 92(s0)
-; RV64I-NEXT: sw s3, 88(s0)
-; RV64I-NEXT: sw s2, 84(s0)
+; RV64I-NEXT: sw s0, 124(s1)
+; RV64I-NEXT: sw s11, 120(s1)
+; RV64I-NEXT: sw s10, 116(s1)
+; RV64I-NEXT: sw s9, 112(s1)
+; RV64I-NEXT: sw s8, 108(s1)
+; RV64I-NEXT: sw s7, 104(s1)
+; RV64I-NEXT: sw s6, 100(s1)
+; RV64I-NEXT: sw s5, 96(s1)
+; RV64I-NEXT: sw s4, 92(s1)
+; RV64I-NEXT: sw s3, 88(s1)
+; RV64I-NEXT: sw s2, 84(s1)
; RV64I-NEXT: ld a0, 0(sp)
;
; RV64I-WITH-FP-LABEL: caller:
; RV64I-WITH-FP: addi s0, sp, 288
; RV64I-WITH-FP-NEXT: lui a0, %hi(var)
-; RV64I-WITH-FP-NEXT: lw a1, %lo(var)(a0)
-; RV64I-WITH-FP-NEXT: sd a1, -112(s0)
; RV64I-WITH-FP-NEXT: addi s1, a0, %lo(var)
; RV64I-WITH-FP: sd a0, -280(s0)
; RV64I-WITH-FP-NEXT: lw s5, 88(s1)
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