diff options
Diffstat (limited to 'llvm/test/CodeGen/R600/llvm.AMDGPU.trig_preop.ll')
| -rw-r--r-- | llvm/test/CodeGen/R600/llvm.AMDGPU.trig_preop.ll | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/llvm/test/CodeGen/R600/llvm.AMDGPU.trig_preop.ll b/llvm/test/CodeGen/R600/llvm.AMDGPU.trig_preop.ll index 8eecd6eaef1..2e6bd5c0633 100644 --- a/llvm/test/CodeGen/R600/llvm.AMDGPU.trig_preop.ll +++ b/llvm/test/CodeGen/R600/llvm.AMDGPU.trig_preop.ll @@ -3,11 +3,11 @@ declare double @llvm.AMDGPU.trig.preop.f64(double, i32) nounwind readnone ; SI-LABEL: {{^}}test_trig_preop_f64: -; SI-DAG: BUFFER_LOAD_DWORD [[SEG:v[0-9]+]] -; SI-DAG: BUFFER_LOAD_DWORDX2 [[SRC:v\[[0-9]+:[0-9]+\]]], -; SI: V_TRIG_PREOP_F64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], [[SEG]] -; SI: BUFFER_STORE_DWORDX2 [[RESULT]], -; SI: S_ENDPGM +; SI-DAG: buffer_load_dword [[SEG:v[0-9]+]] +; SI-DAG: buffer_load_dwordx2 [[SRC:v\[[0-9]+:[0-9]+\]]], +; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], [[SEG]] +; SI: buffer_store_dwordx2 [[RESULT]], +; SI: s_endpgm define void @test_trig_preop_f64(double addrspace(1)* %out, double addrspace(1)* %aptr, i32 addrspace(1)* %bptr) nounwind { %a = load double addrspace(1)* %aptr, align 8 %b = load i32 addrspace(1)* %bptr, align 4 @@ -17,10 +17,10 @@ define void @test_trig_preop_f64(double addrspace(1)* %out, double addrspace(1)* } ; SI-LABEL: {{^}}test_trig_preop_f64_imm_segment: -; SI: BUFFER_LOAD_DWORDX2 [[SRC:v\[[0-9]+:[0-9]+\]]], -; SI: V_TRIG_PREOP_F64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], 7 -; SI: BUFFER_STORE_DWORDX2 [[RESULT]], -; SI: S_ENDPGM +; SI: buffer_load_dwordx2 [[SRC:v\[[0-9]+:[0-9]+\]]], +; SI: v_trig_preop_f64 [[RESULT:v\[[0-9]+:[0-9]+\]]], [[SRC]], 7 +; SI: buffer_store_dwordx2 [[RESULT]], +; SI: s_endpgm define void @test_trig_preop_f64_imm_segment(double addrspace(1)* %out, double addrspace(1)* %aptr) nounwind { %a = load double addrspace(1)* %aptr, align 8 %result = call double @llvm.AMDGPU.trig.preop.f64(double %a, i32 7) nounwind readnone |
