diff options
Diffstat (limited to 'llvm/test/CodeGen/PowerPC')
3 files changed, 35 insertions, 8 deletions
diff --git a/llvm/test/CodeGen/PowerPC/cannonicalize-vector-shifts.ll b/llvm/test/CodeGen/PowerPC/cannonicalize-vector-shifts.ll new file mode 100644 index 00000000000..68d4530e81e --- /dev/null +++ b/llvm/test/CodeGen/PowerPC/cannonicalize-vector-shifts.ll @@ -0,0 +1,27 @@ +; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu \ +; RUN: -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-linux-gnu \ +; RUN: -verify-machineinstrs < %s | FileCheck %s +define <4 x i32> @test1(<4 x i32> %a) { +entry: +; CHECK-LABEL: test1 +; CHECK: xxswapd 34, 34 + %vecins6 = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 2, i32 3, i32 0, i32 1> + ret <4 x i32> %vecins6 +} + +define <8 x i16> @test2(<8 x i16> %a) #0 { +entry: +; CHECK-LABEL: test2 +; CHECK: xxswapd 34, 34 + %vecins14 = shufflevector <8 x i16> %a, <8 x i16> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> + ret <8 x i16> %vecins14 +} + +define <16 x i8> @test3(<16 x i8> %a) #0 { +entry: +; CHECK-LABEL: test3 +; CHECK: xxswapd 34, 34 + %vecins30 = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> + ret <16 x i8> %vecins30 +} diff --git a/llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll b/llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll index 8da8df58a85..b3451843133 100644 --- a/llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll +++ b/llvm/test/CodeGen/PowerPC/p8-scalar_vector_conversions.ll @@ -1102,7 +1102,7 @@ entry: ; CHECK: mfvsrwz 3, [[SHL]] ; CHECK: extsw 3, 3 ; CHECK-LE-LABEL: @getsi0 -; CHECK-LE: xxsldwi [[SHL:[0-9]+]], 34, 34, 2 +; CHECK-LE: xxswapd [[SHL:[0-9]+]], 34 ; CHECK-LE: mfvsrwz 3, [[SHL]] ; CHECK-LE: extsw 3, 3 } @@ -1150,7 +1150,7 @@ entry: %vecext = extractelement <4 x i32> %0, i32 3 ret i32 %vecext ; CHECK-LABEL: @getsi3 -; CHECK: xxsldwi [[SHL:[0-9]+]], 34, 34, 2 +; CHECK: xxswapd [[SHL:[0-9]+]], 34 ; CHECK: mfvsrwz 3, [[SHL]] ; CHECK: extsw 3, 3 ; CHECK-LE-LABEL: @getsi3 @@ -1172,7 +1172,7 @@ entry: ; CHECK: mfvsrwz 3, [[SHL]] ; CHECK: clrldi 3, 3, 32 ; CHECK-LE-LABEL: @getui0 -; CHECK-LE: xxsldwi [[SHL:[0-9]+]], 34, 34, 2 +; CHECK-LE: xxswapd [[SHL:[0-9]+]], 34 ; CHECK-LE: mfvsrwz 3, [[SHL]] ; CHECK-LE: clrldi 3, 3, 32 } @@ -1220,7 +1220,7 @@ entry: %vecext = extractelement <4 x i32> %0, i32 3 ret i32 %vecext ; CHECK-LABEL: @getui3 -; CHECK: xxsldwi [[SHL:[0-9]+]], 34, 34, 2 +; CHECK: xxswapd [[SHL:[0-9]+]], 34 ; CHECK: mfvsrwz 3, [[SHL]] ; CHECK: clrldi 3, 3, 32 ; CHECK-LE-LABEL: @getui3 @@ -1380,7 +1380,7 @@ entry: ; CHECK: xxsldwi [[SHL:[0-9]+]], 34, 34, 1 ; CHECK: xscvspdpn 1, [[SHL]] ; CHECK-LE-LABEL: @getf1 -; CHECK-LE: xxsldwi [[SHL:[0-9]+]], 34, 34, 2 +; CHECK-LE: xxswapd [[SHL:[0-9]+]], 34 ; CHECK-LE: xscvspdpn 1, [[SHL]] } @@ -1393,7 +1393,7 @@ entry: %vecext = extractelement <4 x float> %0, i32 2 ret float %vecext ; CHECK-LABEL: @getf2 -; CHECK: xxsldwi [[SHL:[0-9]+]], 34, 34, 2 +; CHECK: xxswapd [[SHL:[0-9]+]], 34 ; CHECK: xscvspdpn 1, [[SHL]] ; CHECK-LE-LABEL: @getf2 ; CHECK-LE: xxsldwi [[SHL:[0-9]+]], 34, 34, 1 diff --git a/llvm/test/CodeGen/PowerPC/p8altivec-shuffles-pred.ll b/llvm/test/CodeGen/PowerPC/p8altivec-shuffles-pred.ll index 3610c044b94..74dc1561d9f 100644 --- a/llvm/test/CodeGen/PowerPC/p8altivec-shuffles-pred.ll +++ b/llvm/test/CodeGen/PowerPC/p8altivec-shuffles-pred.ll @@ -9,8 +9,8 @@ entry: ret <2 x i32> %strided.vec ; CHECK-LABEL: @test1 -; CHECK: vsldoi [[TGT:[0-9]+]], 2, 2, 8 -; CHECK: vmrghw 2, 2, [[TGT]] +; CHECK: xxswapd 35, 34 +; CHECK: vmrghw 2, 2, 3 ; CHECK: blr } |
