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-rw-r--r--llvm/test/CodeGen/PowerPC/vsx.ll48
1 files changed, 48 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/vsx.ll b/llvm/test/CodeGen/PowerPC/vsx.ll
index 2be57d2ae18..92b0eaff9fb 100644
--- a/llvm/test/CodeGen/PowerPC/vsx.ll
+++ b/llvm/test/CodeGen/PowerPC/vsx.ll
@@ -1190,3 +1190,51 @@ entry:
; CHECK-LE: xscmpudp [[REG:[0-9]+]], 3, 4
; CHECK-LE: beqlr [[REG]]
}
+
+; Function Attrs: nounwind readnone
+define <4 x i32> @test83(i8* %a) {
+ entry:
+ %0 = tail call <4 x i32> @llvm.ppc.vsx.lxvw4x.be(i8* %a)
+ ret <4 x i32> %0
+ ; CHECK-LABEL: test83
+ ; CHECK: lxvw4x 34, 0, 3
+ ; CHECK: blr
+}
+; Function Attrs: nounwind readnone
+declare <4 x i32> @llvm.ppc.vsx.lxvw4x.be(i8*)
+
+; Function Attrs: nounwind readnone
+define <2 x double> @test84(i8* %a) {
+ entry:
+ %0 = tail call <2 x double> @llvm.ppc.vsx.lxvd2x.be(i8* %a)
+ ret <2 x double> %0
+ ; CHECK-LABEL: test84
+ ; CHECK: lxvd2x 34, 0, 3
+ ; CHECK: blr
+}
+; Function Attrs: nounwind readnone
+declare <2 x double> @llvm.ppc.vsx.lxvd2x.be(i8*)
+
+; Function Attrs: nounwind readnone
+define void @test85(<4 x i32> %a, i8* %b) {
+ entry:
+ tail call void @llvm.ppc.vsx.stxvw4x.be(<4 x i32> %a, i8* %b)
+ ret void
+ ; CHECK-LABEL: test85
+ ; CHECK: stxvw4x 34, 0, 5
+ ; CHECK: blr
+}
+; Function Attrs: nounwind readnone
+declare void @llvm.ppc.vsx.stxvw4x.be(<4 x i32>, i8*)
+
+; Function Attrs: nounwind readnone
+define void @test86(<2 x double> %a, i8* %b) {
+ entry:
+ tail call void @llvm.ppc.vsx.stxvd2x.be(<2 x double> %a, i8* %b)
+ ret void
+ ; CHECK-LABEL: test86
+ ; CHECK: stxvd2x 34, 0, 5
+ ; CHECK: blr
+}
+; Function Attrs: nounwind readnone
+declare void @llvm.ppc.vsx.stxvd2x.be(<2 x double>, i8*)
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