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-rw-r--r--llvm/test/CodeGen/PowerPC/unal-altivec.ll13
1 files changed, 6 insertions, 7 deletions
diff --git a/llvm/test/CodeGen/PowerPC/unal-altivec.ll b/llvm/test/CodeGen/PowerPC/unal-altivec.ll
index a804b35052b..081d582b741 100644
--- a/llvm/test/CodeGen/PowerPC/unal-altivec.ll
+++ b/llvm/test/CodeGen/PowerPC/unal-altivec.ll
@@ -29,15 +29,14 @@ vector.body: ; preds = %vector.body, %vecto
br i1 %10, label %for.end, label %vector.body
; CHECK: @foo
-; CHECK-DAG: li [[C0:[0-9]+]], 0
+; CHECK-DAG: li [[C16:[0-9]+]], 16
; CHECK-DAG: lvx [[CNST:[0-9]+]],
; CHECK: .LBB0_1:
-; CHECK-DAG: lvsl [[MASK1:[0-9]+]], [[B1:[0-9]+]], [[C0]]
-; CHECK-DAG: add [[B3:[0-9]+]], [[B1]], [[C0]]
-; CHECK-DAG: lvx [[LD1:[0-9]+]], [[B1]], [[C0]]
-; CHECK-DAG: lvx [[LD2:[0-9]+]], [[B3]],
-; CHECK-DAG: vperm [[R1:[0-9]+]], [[LD1]], [[LD2]], [[MASK1]]
-; CHECK-DAG: vaddfp {{[0-9]+}}, [[R1]], [[CNST]]
+; CHECK-DAG: lvx [[LD1:[0-9]+]], 0, [[C0:[0-9]+]]
+; CHECK-DAG: lvx [[LD2:[0-9]+]], [[C0]], [[C16]]
+; CHECK-DAG: lvsl [[MASK1:[0-9]+]], 0, [[C0]]
+; CHECK-DAG: vperm [[VR1:[0-9]+]], [[LD1]], [[LD2]], [[MASK1]]
+; CHECK-DAG: vaddfp {{[0-9]+}}, [[VR1]], [[CNST]]
; CHECK: blr
for.end: ; preds = %vector.body
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