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-rw-r--r--llvm/test/CodeGen/PowerPC/ppc64-align-long-double.ll46
1 files changed, 15 insertions, 31 deletions
diff --git a/llvm/test/CodeGen/PowerPC/ppc64-align-long-double.ll b/llvm/test/CodeGen/PowerPC/ppc64-align-long-double.ll
index 1639fa7980e..c6c7e2f5b6a 100644
--- a/llvm/test/CodeGen/PowerPC/ppc64-align-long-double.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64-align-long-double.ll
@@ -18,35 +18,19 @@ entry:
ret ppc_fp128 %0
}
-;; FIXME: Sadly, we now have an extra store to a temp variable here,
-;; which comes from (roughly):
-;; store i64 <val> to i64* <frame>
-;; bitcast (load i64* <frame>) to f64
-;; The code now can elide the load, making:
-;; store i64 <val> -> <frame>
-;; bitcast i64 <val> to f64
-;; Finally, the bitcast itself turns into a store/load pair.
-;;
-;; This behavior is new, because previously, llvm was accidentally
-;; unable to detect that the load came directly from the store, and
-;; elide it.
+; CHECK-DAG: std 6, 72(1)
+; CHECK-DAG: std 5, 64(1)
+; CHECK-DAG: std 4, 56(1)
+; CHECK-DAG: std 3, 48(1)
+; CHECK: lfd 1, 64(1)
+; CHECK: lfd 2, 72(1)
-; CHECK: std 6, 72(1)
-; CHECK: std 5, 64(1)
-; CHECK: std 4, 56(1)
-; CHECK: std 3, 48(1)
-; CHECK: std 5, -16(1)
-; CHECK: std 6, -8(1)
-; CHECK: lfd 1, -16(1)
-; CHECK: lfd 2, -8(1)
-
-; CHECK-VSX: std 6, 72(1)
-; CHECK-VSX: std 5, 64(1)
-; CHECK-VSX: std 4, 56(1)
-; CHECK-VSX: std 3, 48(1)
-; CHECK-VSX: std 5, -16(1)
-; CHECK-VSX: std 6, -8(1)
-; CHECK-VSX: addi 3, 1, -16
-; CHECK-VSX: lxsdx 1, 0, 3
-; CHECK-VSX: addi 3, 1, -8
-; CHECK-VSX: lxsdx 2, 0, 3
+; CHECK-VSX-DAG: std 6, 72(1)
+; CHECK-VSX-DAG: std 5, 64(1)
+; CHECK-VSX-DAG: std 4, 56(1)
+; CHECK-VSX-DAG: std 3, 48(1)
+; CHECK-VSX: li 3, 16
+; CHECK-VSX: addi 4, 1, 48
+; CHECK-VSX: lxsdx 1, 4, 3
+; CHECK-VSX: li 3, 24
+; CHECK-VSX: lxsdx 2, 4, 3
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