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-rw-r--r--llvm/test/CodeGen/PowerPC/f128-conv.ll126
1 files changed, 126 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/PowerPC/f128-conv.ll b/llvm/test/CodeGen/PowerPC/f128-conv.ll
index d330bd777bd..42949685e3c 100644
--- a/llvm/test/CodeGen/PowerPC/f128-conv.ll
+++ b/llvm/test/CodeGen/PowerPC/f128-conv.ll
@@ -714,3 +714,129 @@ entry:
store fp128 %conv, fp128* %res, align 16
ret void
}
+
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+
+; Function Attrs: norecurse nounwind
+define void @cvdp2sw2qp(double %val, fp128* nocapture %res) {
+; CHECK-LABEL: cvdp2sw2qp:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xscvdpsxws 2, 1
+; CHECK-NEXT: vextsw2d 2, 2
+; CHECK-NEXT: xscvsdqp 2, 2
+; CHECK-NEXT: stxv 2, 0(4)
+; CHECK-NEXT: blr
+entry:
+ %conv = fptosi double %val to i32
+ %conv1 = sitofp i32 %conv to fp128
+ store fp128 %conv1, fp128* %res, align 16
+ ret void
+}
+
+; Function Attrs: norecurse nounwind
+define void @cvdp2sdw2qp(double %val, fp128* nocapture %res) {
+; CHECK-LABEL: cvdp2sdw2qp:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xscvdpsxds 2, 1
+; CHECK-NEXT: xscvsdqp 2, 2
+; CHECK-NEXT: stxv 2, 0(4)
+; CHECK-NEXT: blr
+entry:
+ %conv = fptosi double %val to i64
+ %conv1 = sitofp i64 %conv to fp128
+ store fp128 %conv1, fp128* %res, align 16
+ ret void
+}
+
+; Function Attrs: norecurse nounwind
+define void @cvsp2sw2qp(float %val, fp128* nocapture %res) {
+; CHECK-LABEL: cvsp2sw2qp:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xscvdpsxws 2, 1
+; CHECK-NEXT: vextsw2d 2, 2
+; CHECK-NEXT: xscvsdqp 2, 2
+; CHECK-NEXT: stxv 2, 0(4)
+; CHECK-NEXT: blr
+entry:
+ %conv = fptosi float %val to i32
+ %conv1 = sitofp i32 %conv to fp128
+ store fp128 %conv1, fp128* %res, align 16
+ ret void
+}
+
+; Function Attrs: norecurse nounwind
+define void @cvsp2sdw2qp(float %val, fp128* nocapture %res) {
+; CHECK-LABEL: cvsp2sdw2qp:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xscvdpsxds 2, 1
+; CHECK-NEXT: xscvsdqp 2, 2
+; CHECK-NEXT: stxv 2, 0(4)
+; CHECK-NEXT: blr
+entry:
+ %conv = fptosi float %val to i64
+ %conv1 = sitofp i64 %conv to fp128
+ store fp128 %conv1, fp128* %res, align 16
+ ret void
+}
+
+; Function Attrs: norecurse nounwind
+define void @cvdp2uw2qp(double %val, fp128* nocapture %res) {
+; CHECK-LABEL: cvdp2uw2qp:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xscvdpuxws 0, 1
+; CHECK-NEXT: xxextractuw 2, 0, 8
+; CHECK-NEXT: xscvudqp 2, 2
+; CHECK-NEXT: stxv 2, 0(4)
+; CHECK-NEXT: blr
+entry:
+ %conv = fptoui double %val to i32
+ %conv1 = uitofp i32 %conv to fp128
+ store fp128 %conv1, fp128* %res, align 16
+ ret void
+}
+
+; Function Attrs: norecurse nounwind
+define void @cvdp2udw2qp(double %val, fp128* nocapture %res) {
+; CHECK-LABEL: cvdp2udw2qp:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xscvdpuxds 2, 1
+; CHECK-NEXT: xscvudqp 2, 2
+; CHECK-NEXT: stxv 2, 0(4)
+; CHECK-NEXT: blr
+entry:
+ %conv = fptoui double %val to i64
+ %conv1 = uitofp i64 %conv to fp128
+ store fp128 %conv1, fp128* %res, align 16
+ ret void
+}
+
+; Function Attrs: norecurse nounwind
+define void @cvsp2uw2qp(float %val, fp128* nocapture %res) {
+; CHECK-LABEL: cvsp2uw2qp:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xscvdpuxws 0, 1
+; CHECK-NEXT: xxextractuw 2, 0, 8
+; CHECK-NEXT: xscvudqp 2, 2
+; CHECK-NEXT: stxv 2, 0(4)
+; CHECK-NEXT: blr
+entry:
+ %conv = fptoui float %val to i32
+ %conv1 = uitofp i32 %conv to fp128
+ store fp128 %conv1, fp128* %res, align 16
+ ret void
+}
+
+; Function Attrs: norecurse nounwind
+define void @cvsp2udw2qp(float %val, fp128* nocapture %res) {
+; CHECK-LABEL: cvsp2udw2qp:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: xscvdpuxds 2, 1
+; CHECK-NEXT: xscvudqp 2, 2
+; CHECK-NEXT: stxv 2, 0(4)
+; CHECK-NEXT: blr
+entry:
+ %conv = fptoui float %val to i64
+ %conv1 = uitofp i64 %conv to fp128
+ store fp128 %conv1, fp128* %res, align 16
+ ret void
+}
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