diff options
Diffstat (limited to 'llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir')
| -rw-r--r-- | llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir | 170 |
1 files changed, 85 insertions, 85 deletions
diff --git a/llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir b/llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir index 3504f1d229a..df5b040b5dc 100644 --- a/llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir +++ b/llvm/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir @@ -38,7 +38,7 @@ } ; Function Attrs: norecurse nounwind readnone - define i64 @testADDCo(i64 %a, i64 %b) local_unnamed_addr #0 { + define i64 @testADDC_rec(i64 %a, i64 %b) local_unnamed_addr #0 { entry: %add = add nsw i64 %b, %a %cmp = icmp eq i64 %add, 0 @@ -62,7 +62,7 @@ } ; Function Attrs: norecurse nounwind readnone - define signext i32 @testANDo(i64 %a, i64 %b) local_unnamed_addr #0 { + define signext i32 @testAND_rec(i64 %a, i64 %b) local_unnamed_addr #0 { entry: %and = and i64 %b, %a %tobool = icmp eq i64 %and, 0 @@ -72,7 +72,7 @@ } ; Function Attrs: norecurse nounwind readnone - define i64 @testAND8o(i64 %a, i64 %b) local_unnamed_addr #0 { + define i64 @testAND8_rec(i64 %a, i64 %b) local_unnamed_addr #0 { entry: %and = and i64 %b, %a %tobool = icmp eq i64 %and, 0 @@ -506,7 +506,7 @@ } ; Function Attrs: norecurse nounwind readnone - define i64 @testRLDCLo(i64 %a, i64 %b) local_unnamed_addr #0 { + define i64 @testRLDCL_rec(i64 %a, i64 %b) local_unnamed_addr #0 { entry: %and = and i64 %b, 63 %shl = shl i64 %a, %and @@ -530,7 +530,7 @@ } ; Function Attrs: norecurse nounwind readnone - define i64 @testRLDCRo(i64 %a, i64 %b) local_unnamed_addr #0 { + define i64 @testRLDCR_rec(i64 %a, i64 %b) local_unnamed_addr #0 { entry: %and = and i64 %b, 63 %shl = shl i64 %a, %and @@ -551,7 +551,7 @@ } ; Function Attrs: norecurse nounwind readnone - define i64 @testRLDICLo(i64 %a, i64 %b) local_unnamed_addr #0 { + define i64 @testRLDICL_rec(i64 %a, i64 %b) local_unnamed_addr #0 { entry: %shr = lshr i64 %a, 11 %and = and i64 %shr, 16777215 @@ -561,7 +561,7 @@ } ; Function Attrs: norecurse nounwind readnone - define i64 @testRLDICLo2(i64 %a, i64 %b) local_unnamed_addr #0 { + define i64 @testRLDICL_rec2(i64 %a, i64 %b) local_unnamed_addr #0 { entry: %shr = lshr i64 %a, 11 %and = and i64 %shr, 16777215 @@ -571,7 +571,7 @@ } ; Function Attrs: norecurse nounwind readnone - define i64 @testRLDICLo3(i64 %a, i64 %b) local_unnamed_addr #0 { + define i64 @testRLDICL_rec3(i64 %a, i64 %b) local_unnamed_addr #0 { entry: %shr = lshr i64 %a, 11 %and = and i64 %shr, 16777215 @@ -613,7 +613,7 @@ } ; Function Attrs: norecurse nounwind readnone - define zeroext i32 @testRLWINMo(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { + define zeroext i32 @testRLWINM_rec(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { entry: %and = and i32 %a, 255 %tobool = icmp eq i32 %and, 0 @@ -622,7 +622,7 @@ } ; Function Attrs: norecurse nounwind readnone - define zeroext i32 @testRLWINMo2(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { + define zeroext i32 @testRLWINM_rec2(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { entry: %and = and i32 %a, 255 %tobool = icmp eq i32 %and, 0 @@ -631,7 +631,7 @@ } ; Function Attrs: norecurse nounwind readnone - define i64 @testRLWINM8o(i64 %a, i64 %b) local_unnamed_addr #0 { + define i64 @testRLWINM8_rec(i64 %a, i64 %b) local_unnamed_addr #0 { entry: %a.tr = trunc i64 %a to i32 %0 = shl i32 %a.tr, 4 @@ -650,7 +650,7 @@ } ; Function Attrs: norecurse nounwind readnone - define i64 @testSLDo(i64 %a, i64 %b) local_unnamed_addr #0 { + define i64 @testSLD_rec(i64 %a, i64 %b) local_unnamed_addr #0 { entry: %shl = shl i64 %a, %b %tobool = icmp eq i64 %shl, 0 @@ -666,7 +666,7 @@ } ; Function Attrs: norecurse nounwind readnone - define i64 @testSRDo(i64 %a, i64 %b) local_unnamed_addr #0 { + define i64 @testSRD_rec(i64 %a, i64 %b) local_unnamed_addr #0 { entry: %shr = lshr i64 %a, %b %tobool = icmp eq i64 %shr, 0 @@ -682,7 +682,7 @@ } ; Function Attrs: norecurse nounwind readnone - define zeroext i32 @testSLWo(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { + define zeroext i32 @testSLW_rec(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { entry: %shl = shl i32 %a, %b %tobool = icmp eq i32 %shl, 0 @@ -698,7 +698,7 @@ } ; Function Attrs: norecurse nounwind readnone - define zeroext i32 @testSRWo(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { + define zeroext i32 @testSRW_rec(i32 zeroext %a, i32 zeroext %b) local_unnamed_addr #0 { entry: %shr = lshr i32 %a, %b %tobool = icmp eq i32 %shr, 0 @@ -714,7 +714,7 @@ } ; Function Attrs: norecurse nounwind readnone - define signext i32 @testSRAWo(i32 signext %a, i32 signext %b) local_unnamed_addr #0 { + define signext i32 @testSRAW_rec(i32 signext %a, i32 signext %b) local_unnamed_addr #0 { entry: %shr = ashr i32 %a, %b %tobool = icmp eq i32 %shr, 0 @@ -730,7 +730,7 @@ } ; Function Attrs: norecurse nounwind readnone - define i64 @testSRADo(i64 %a, i64 %b) local_unnamed_addr #0 { + define i64 @testSRAD_rec(i64 %a, i64 %b) local_unnamed_addr #0 { entry: %shr = ashr i64 %a, %b %tobool = icmp eq i64 %shr, 0 @@ -1236,8 +1236,8 @@ body: | ... --- -name: testADDCo -# CHECK-ALL: name: testADDCo +name: testADDC_rec +# CHECK-ALL: name: testADDC_rec alignment: 16 exposesReturnsTwice: false legalized: false @@ -1284,8 +1284,8 @@ body: | %1 = LI 433 %0 = COPY $x3 %2 = COPY %0.sub_32 - %3 = ADDCo %1, %2, implicit-def $cr0, implicit-def $carry - ; CHECK: ADDICo %2, 433, implicit-def $cr0, implicit-def $carry + %3 = ADDC_rec %1, %2, implicit-def $cr0, implicit-def $carry + ; CHECK: ADDIC_rec %2, 433, implicit-def $cr0, implicit-def $carry ; CHECK-LATE: addic. 3, 3, 433 %4 = COPY killed $cr0 %5 = COPY %4.sub_eq @@ -1397,8 +1397,8 @@ body: | ... --- -name: testANDo -# CHECK-ALL: name: testANDo +name: testAND_rec +# CHECK-ALL: name: testAND_rec alignment: 16 exposesReturnsTwice: false legalized: false @@ -1443,8 +1443,8 @@ body: | %1 = LI 78 %0 = COPY $x3 %2 = COPY %0.sub_32 - %3 = ANDo %1, %2, implicit-def $cr0 - ; CHECK: ANDIo %2, 78, implicit-def $cr0 + %3 = AND_rec %1, %2, implicit-def $cr0 + ; CHECK: ANDI_rec %2, 78, implicit-def $cr0 ; CHECK-LATE: andi. 5, 3, 78 %4 = COPY killed $cr0 %5 = ISEL %2, %1, %4.sub_eq @@ -1454,8 +1454,8 @@ body: | ... --- -name: testAND8o -# CHECK-ALL: name: testAND8o +name: testAND8_rec +# CHECK-ALL: name: testAND8_rec alignment: 16 exposesReturnsTwice: false legalized: false @@ -1497,8 +1497,8 @@ body: | %1 = LI8 321 %0 = COPY $x3 - %2 = AND8o %1, %0, implicit-def $cr0 - ; CHECK: ANDI8o %0, 321, implicit-def $cr0 + %2 = AND8_rec %1, %0, implicit-def $cr0 + ; CHECK: ANDI8_rec %0, 321, implicit-def $cr0 ; CHECK-LATE: andi. 5, 3, 321 %3 = COPY killed $cr0 %4 = ISEL8 %1, %0, %3.sub_eq @@ -3671,8 +3671,8 @@ body: | ... --- -name: testRLDCLo -# CHECK-ALL: name: testRLDCLo +name: testRLDCL_rec +# CHECK-ALL: name: testRLDCL_rec alignment: 16 exposesReturnsTwice: false legalized: false @@ -3718,8 +3718,8 @@ body: | %0 = COPY $x3 %2 = RLDICL %1, 0, 58 %3 = LI 37 - %4 = RLDCLo %0, killed %3, 0, implicit-def $cr0 - ; CHECK: RLDICLo %0, 37, 0, implicit-def $cr0 + %4 = RLDCL_rec %0, killed %3, 0, implicit-def $cr0 + ; CHECK: RLDICL_rec %0, 37, 0, implicit-def $cr0 ; CHECK-LATE: rldicl. 5, 3, 37, 0 %5 = COPY killed $cr0 %6 = ISEL8 %2, %0, %5.sub_eq @@ -3781,8 +3781,8 @@ body: | ... --- -name: testRLDCRo -# CHECK-ALL: name: testRLDCRo +name: testRLDCR_rec +# CHECK-ALL: name: testRLDCR_rec alignment: 16 exposesReturnsTwice: false legalized: false @@ -3828,8 +3828,8 @@ body: | %0 = COPY $x3 %2 = RLDICL %1, 0, 58 %3 = LI 18 - %4 = RLDCRo %0, killed %3, 0, implicit-def $cr0 - ; CHECK: RLDICRo %0, 18, 0, implicit-def $cr0 + %4 = RLDCR_rec %0, killed %3, 0, implicit-def $cr0 + ; CHECK: RLDICR_rec %0, 18, 0, implicit-def $cr0 ; CHECK-LATE: rldicr. 5, 3, 18, 0 %5 = COPY killed $cr0 %6 = ISEL8 %2, %0, %5.sub_eq @@ -3884,8 +3884,8 @@ body: | ... --- -name: testRLDICLo -# CHECK-ALL: name: testRLDICLo +name: testRLDICL_rec +# CHECK-ALL: name: testRLDICL_rec alignment: 16 exposesReturnsTwice: false legalized: false @@ -3927,8 +3927,8 @@ body: | %1 = COPY $x4 %0 = LI8 -1 - %2 = RLDICLo %0, 53, 48, implicit-def $cr0 - ; CHECK: ANDI8o %0, 65535 + %2 = RLDICL_rec %0, 53, 48, implicit-def $cr0 + ; CHECK: ANDI8_rec %0, 65535 ; CHECK-LATE: li 3, -1 ; CHECK-LATE: andi. 3, 3, 65535 %3 = COPY killed $cr0 @@ -3938,8 +3938,8 @@ body: | ... --- -name: testRLDICLo2 -# CHECK-ALL: name: testRLDICLo2 +name: testRLDICL_rec2 +# CHECK-ALL: name: testRLDICL_rec2 alignment: 16 exposesReturnsTwice: false legalized: false @@ -3981,9 +3981,9 @@ body: | %1 = COPY $x4 %0 = LI8 200 - %2 = RLDICLo %0, 61, 3, implicit-def $cr0 + %2 = RLDICL_rec %0, 61, 3, implicit-def $cr0 ; CHECK: LI8 25 - ; CHECK: ANDI8o %0, 25 + ; CHECK: ANDI8_rec %0, 25 ; CHECK-LATE-NOT: andi. %3 = COPY killed $cr0 %4 = ISEL8 %1, %2, %3.sub_eq @@ -3992,8 +3992,8 @@ body: | ... --- -name: testRLDICLo3 -# CHECK-ALL: name: testRLDICLo3 +name: testRLDICL_rec3 +# CHECK-ALL: name: testRLDICL_rec3 alignment: 16 exposesReturnsTwice: false legalized: false @@ -4035,8 +4035,8 @@ body: | %1 = COPY $x4 %0 = LI8 2 - %2 = RLDICLo %0, 32, 32, implicit-def $cr0 - ; CHECK: ANDI8o %0, 0 + %2 = RLDICL_rec %0, 32, 32, implicit-def $cr0 + ; CHECK: ANDI8_rec %0, 0 ; CHECK-LATE: li 3, 2 ; CHECK-LATE: andi. 3, 3, 0 %3 = COPY killed $cr0 @@ -4248,8 +4248,8 @@ body: | ... --- -name: testRLWINMo -# CHECK-ALL: name: testRLWINMo +name: testRLWINM_rec +# CHECK-ALL: name: testRLWINM_rec alignment: 16 exposesReturnsTwice: false legalized: false @@ -4298,9 +4298,9 @@ body: | %0 = COPY $x3 %2 = COPY %1.sub_32 %3 = LI -22 - %4 = RLWINMo %3, 0, 24, 31, implicit-def $cr0 + %4 = RLWINM_rec %3, 0, 24, 31, implicit-def $cr0 ; CHECK: LI -22 - ; CHECK: ANDIo %3, 65514 + ; CHECK: ANDI_rec %3, 65514 ; CHECK-LATE: li 3, -22 ; CHECK-LATE: andi. 5, 3, 234 %5 = COPY killed $cr0 @@ -4313,8 +4313,8 @@ body: | ... --- -name: testRLWINMo2 -# CHECK-ALL: name: testRLWINMo2 +name: testRLWINM_rec2 +# CHECK-ALL: name: testRLWINM_rec2 alignment: 16 exposesReturnsTwice: false legalized: false @@ -4363,9 +4363,9 @@ body: | %0 = COPY $x3 %2 = COPY %1.sub_32 %3 = LI -22 - %4 = RLWINMo %3, 5, 24, 31, implicit-def $cr0 + %4 = RLWINM_rec %3, 5, 24, 31, implicit-def $cr0 ; CHECK: LI -22 - ; CHECK-NOT: ANDI8o %3, 65514 + ; CHECK-NOT: ANDI8_rec %3, 65514 ; CHECK-LATE-NOT: andi. %5 = COPY killed $cr0 %6 = ISEL %2, %3, %5.sub_eq @@ -4377,8 +4377,8 @@ body: | ... --- -name: testRLWINM8o -# CHECK-ALL: name: testRLWINM8o +name: testRLWINM8_rec +# CHECK-ALL: name: testRLWINM8_rec alignment: 16 exposesReturnsTwice: false legalized: false @@ -4425,8 +4425,8 @@ body: | %1 = COPY $x4 %0 = COPY $x3 %2 = LI8 -18 - %3 = RLWINM8o %2, 4, 20, 27, implicit-def $cr0 - ; CHECK: ANDI8o %2, 3808 + %3 = RLWINM8_rec %2, 4, 20, 27, implicit-def $cr0 + ; CHECK: ANDI8_rec %2, 3808 ; CHECK-LATE: li 3, -18 ; CHECK-LATE: andi. 3, 3, 3808 %7 = COPY killed $cr0 @@ -4488,8 +4488,8 @@ body: | ... --- -name: testSLDo -# CHECK-ALL: name: testSLDo +name: testSLD_rec +# CHECK-ALL: name: testSLD_rec alignment: 16 exposesReturnsTwice: false legalized: false @@ -4533,8 +4533,8 @@ body: | %1 = COPY $x4 %0 = COPY $x3 %2 = LI 17 - %3 = SLDo %0, killed %2, implicit-def $cr0 - ; CHECK: RLDICRo %0, 17, 46, implicit-def $cr0 + %3 = SLD_rec %0, killed %2, implicit-def $cr0 + ; CHECK: RLDICR_rec %0, 17, 46, implicit-def $cr0 ; CHECK-LATE: rldicr. 5, 3, 17, 46 %4 = COPY killed $cr0 %5 = ISEL8 %1, %0, %4.sub_eq @@ -4594,8 +4594,8 @@ body: | ... --- -name: testSRDo -# CHECK-ALL: name: testSRDo +name: testSRD_rec +# CHECK-ALL: name: testSRD_rec alignment: 16 exposesReturnsTwice: false legalized: false @@ -4639,8 +4639,8 @@ body: | %1 = COPY $x4 %0 = COPY $x3 %2 = LI 17 - %3 = SRDo %0, killed %2, implicit-def $cr0 - ; CHECK: RLDICLo %0, 47, 17, implicit-def $cr0 + %3 = SRD_rec %0, killed %2, implicit-def $cr0 + ; CHECK: RLDICL_rec %0, 47, 17, implicit-def $cr0 ; CHECK-LATE: rldicl. 5, 3, 47, 17 %4 = COPY killed $cr0 %5 = ISEL8 %1, %0, %4.sub_eq @@ -4706,8 +4706,8 @@ body: | ... --- -name: testSLWo -# CHECK-ALL: name: testSLWo +name: testSLW_rec +# CHECK-ALL: name: testSLW_rec alignment: 16 exposesReturnsTwice: false legalized: false @@ -4756,8 +4756,8 @@ body: | %0 = COPY $x3 %2 = LI 11 %3 = COPY %0.sub_32 - %4 = SLWo %3, %2, implicit-def $cr0 - ; CHECK: RLWINMo %3, 11, 0, 20, implicit-def $cr0 + %4 = SLW_rec %3, %2, implicit-def $cr0 + ; CHECK: RLWINM_rec %3, 11, 0, 20, implicit-def $cr0 ; CHECK-LATE: rlwinm. 5, 3, 11, 0, 20 %5 = COPY killed $cr0 %6 = ISEL %2, %3, %5.sub_eq @@ -4826,8 +4826,8 @@ body: | ... --- -name: testSRWo -# CHECK-ALL: name: testSRWo +name: testSRW_rec +# CHECK-ALL: name: testSRW_rec alignment: 16 exposesReturnsTwice: false legalized: false @@ -4876,8 +4876,8 @@ body: | %0 = COPY $x3 %2 = LI 7 %3 = COPY %0.sub_32 - %4 = SRWo %3, %2, implicit-def $cr0 - ; CHECK: RLWINMo %3, 25, 7, 31 + %4 = SRW_rec %3, %2, implicit-def $cr0 + ; CHECK: RLWINM_rec %3, 25, 7, 31 ; CHECK-LATE: rlwinm. 5, 3, 25, 7, 31 %5 = COPY killed $cr0 %6 = ISEL %2, %3, %5.sub_eq @@ -4944,8 +4944,8 @@ body: | ... --- -name: testSRAWo -# CHECK-ALL: name: testSRAWo +name: testSRAW_rec +# CHECK-ALL: name: testSRAW_rec alignment: 16 exposesReturnsTwice: false legalized: false @@ -4992,8 +4992,8 @@ body: | %0 = COPY $x3 %2 = LI 8 %3 = COPY %0.sub_32 - %4 = SRAWo killed %3, %2, implicit-def dead $carry, implicit-def $cr0 - ; CHECK: SRAWIo killed %3, 8, implicit-def dead $carry, implicit-def $cr0 + %4 = SRAW_rec killed %3, %2, implicit-def dead $carry, implicit-def $cr0 + ; CHECK: SRAWI_rec killed %3, 8, implicit-def dead $carry, implicit-def $cr0 ; CHECK-LATE: srawi. 3, 3, 8 %5 = COPY killed $cr0 %6 = ISEL %2, %4, %5.sub_eq @@ -5054,8 +5054,8 @@ body: | ... --- -name: testSRADo -# CHECK-ALL: name: testSRADo +name: testSRAD_rec +# CHECK-ALL: name: testSRAD_rec alignment: 16 exposesReturnsTwice: false legalized: false @@ -5099,8 +5099,8 @@ body: | %1 = COPY $x4 %0 = COPY $x3 %2 = LI 61 - %3 = SRADo %0, killed %2, implicit-def dead $carry, implicit-def $cr0 - ; CHECK: SRADIo %0, 61, implicit-def dead $carry, implicit-def $cr0 + %3 = SRAD_rec %0, killed %2, implicit-def dead $carry, implicit-def $cr0 + ; CHECK: SRADI_rec %0, 61, implicit-def dead $carry, implicit-def $cr0 ; CHECK-LATE: sradi. 3, 3, 61 %4 = COPY killed $cr0 %5 = ISEL8 %1, %3, %4.sub_eq |
