diff options
Diffstat (limited to 'llvm/test/CodeGen/NVPTX/misaligned-vector-ldst.ll')
| -rw-r--r-- | llvm/test/CodeGen/NVPTX/misaligned-vector-ldst.ll | 58 |
1 files changed, 58 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/NVPTX/misaligned-vector-ldst.ll b/llvm/test/CodeGen/NVPTX/misaligned-vector-ldst.ll index 2ad72b01885..036d9638cea 100644 --- a/llvm/test/CodeGen/NVPTX/misaligned-vector-ldst.ll +++ b/llvm/test/CodeGen/NVPTX/misaligned-vector-ldst.ll @@ -41,6 +41,64 @@ define <4 x float> @t4(i8* %p1) { ret <4 x float> %r } +; CHECK-LABEL: .visible .func test_v1halfp0a1( +; CHECK-DAG: ld.param.u64 %[[FROM:rd?[0-9]+]], [test_v1halfp0a1_param_0]; +; CHECK-DAG: ld.param.u64 %[[TO:rd?[0-9]+]], [test_v1halfp0a1_param_1]; +; CHECK-DAG: ld.u8 [[B0:%r[sd]?[0-9]+]], [%[[FROM]]] +; CHECK-DAG: st.u8 [%[[TO]]], [[B0]] +; CHECK-DAG: ld.u8 [[B1:%r[sd]?[0-9]+]], [%[[FROM]]+1] +; CHECK-DAG: st.u8 [%[[TO]]+1], [[B1]] +; CHECK: ret +define void @test_v1halfp0a1(<1 x half> * noalias readonly %from, <1 x half> * %to) { + %1 = load <1 x half>, <1 x half> * %from , align 1 + store <1 x half> %1, <1 x half> * %to , align 1 + ret void +} + +; CHECK-LABEL: .visible .func test_v2halfp0a1( +; CHECK-DAG: ld.param.u64 %[[FROM:rd?[0-9]+]], [test_v2halfp0a1_param_0]; +; CHECK-DAG: ld.param.u64 %[[TO:rd?[0-9]+]], [test_v2halfp0a1_param_1]; +; CHECK-DAG: ld.u8 [[B0:%r[sd]?[0-9]+]], [%[[FROM]]] +; CHECK-DAG: st.u8 [%[[TO]]], +; CHECK-DAG: ld.u8 [[B1:%r[sd]?[0-9]+]], [%[[FROM]]+1] +; CHECK-DAG: st.u8 [%[[TO]]+1], +; CHECK-DAG: ld.u8 [[B2:%r[sd]?[0-9]+]], [%[[FROM]]+2] +; CHECK-DAG: st.u8 [%[[TO]]+2], +; CHECK-DAG: ld.u8 [[B3:%r[sd]?[0-9]+]], [%[[FROM]]+3] +; CHECK-DAG: st.u8 [%[[TO]]+3], +; CHECK: ret +define void @test_v2halfp0a1(<2 x half> * noalias readonly %from, <2 x half> * %to) { + %1 = load <2 x half>, <2 x half> * %from , align 1 + store <2 x half> %1, <2 x half> * %to , align 1 + ret void +} + +; CHECK-LABEL: .visible .func test_v4halfp0a1( +; CHECK-DAG: ld.param.u64 %[[FROM:rd?[0-9]+]], [test_v4halfp0a1_param_0]; +; CHECK-DAG: ld.param.u64 %[[TO:rd?[0-9]+]], [test_v4halfp0a1_param_1]; +; CHECK-DAG: ld.u8 [[B0:%r[sd]?[0-9]+]], [%[[FROM]]] +; CHECK-DAG: st.u8 [%[[TO]]], [[B0]] +; CHECK-DAG: ld.u8 [[B1:%r[sd]?[0-9]+]], [%[[FROM]]+1] +; CHECK-DAG: st.u8 [%[[TO]]+1], [[B1]] +; CHECK-DAG: ld.u8 [[B2:%r[sd]?[0-9]+]], [%[[FROM]]+2] +; CHECK-DAG: st.u8 [%[[TO]]+2], [[B2]] +; CHECK-DAG: ld.u8 [[B3:%r[sd]?[0-9]+]], [%[[FROM]]+3] +; CHECK-DAG: st.u8 [%[[TO]]+3], [[B3]] +; CHECK-DAG: ld.u8 [[B4:%r[sd]?[0-9]+]], [%[[FROM]]+4] +; CHECK-DAG: st.u8 [%[[TO]]+4], [[B4]] +; CHECK-DAG: ld.u8 [[B5:%r[sd]?[0-9]+]], [%[[FROM]]+5] +; CHECK-DAG: st.u8 [%[[TO]]+5], [[B5]] +; CHECK-DAG: ld.u8 [[B6:%r[sd]?[0-9]+]], [%[[FROM]]+6] +; CHECK-DAG: st.u8 [%[[TO]]+6], [[B6]] +; CHECK-DAG: ld.u8 [[B7:%r[sd]?[0-9]+]], [%[[FROM]]+7] +; CHECK-DAG: st.u8 [%[[TO]]+7], [[B7]] +; CHECK: ret +define void @test_v4halfp0a1(<4 x half> * noalias readonly %from, <4 x half> * %to) { + %1 = load <4 x half>, <4 x half> * %from , align 1 + store <4 x half> %1, <4 x half> * %to , align 1 + ret void +} + ; CHECK-LABEL: s1 define void @s1(<4 x float>* %p1, <4 x float> %v) { |
