diff options
Diffstat (limited to 'llvm/test/CodeGen/Mips')
| -rw-r--r-- | llvm/test/CodeGen/Mips/micromips-or16.ll | 29 |
1 files changed, 17 insertions, 12 deletions
diff --git a/llvm/test/CodeGen/Mips/micromips-or16.ll b/llvm/test/CodeGen/Mips/micromips-or16.ll index 82ea9c687df..ae2c53884ef 100644 --- a/llvm/test/CodeGen/Mips/micromips-or16.ll +++ b/llvm/test/CodeGen/Mips/micromips-or16.ll @@ -1,18 +1,23 @@ ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=+micromips \ ; RUN: -relocation-model=pic -O3 < %s | FileCheck %s +; RUN: llc -O0 -march=mips -mcpu=mips32r2 -mattr=+micromips \ +; RUN: -asm-show-inst < %s | FileCheck %s -define i32 @main() { -entry: - %retval = alloca i32, align 4 - %a = alloca i32, align 4 - %b = alloca i32, align 4 - %c = alloca i32, align 4 - store i32 0, i32* %retval - %0 = load i32, i32* %b, align 4 - %1 = load i32, i32* %c, align 4 - %or = or i32 %0, %1 - store i32 %or, i32* %a, align 4 - ret i32 0 +; Branch instruction added to enable FastISel::selectOperator +; to select OR instruction +define i32 @f1(i32 signext %a, i32 signext %b) { +; CHECK-LABEL: f1 +; CHECK-NOT: OR16_MMR6 + %1 = or i32 %a, %b + br label %b1 +b1: + ret i32 %1 } +define i32 @f2(i32 signext %a, i32 signext %b) { +entry: +; CHECK-LABEL: f2 ; CHECK: or16 + %0 = or i32 %a, %b + ret i32 %0 +} |
