diff options
Diffstat (limited to 'llvm/test/CodeGen/Mips/GlobalISel/instruction-select/mul.mir')
| -rw-r--r-- | llvm/test/CodeGen/Mips/GlobalISel/instruction-select/mul.mir | 30 |
1 files changed, 18 insertions, 12 deletions
diff --git a/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/mul.mir b/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/mul.mir index 0b173e1c741..205ecf38705 100644 --- a/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/mul.mir +++ b/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/mul.mir @@ -3,7 +3,7 @@ --- | define void @mul_i32(i32 %x, i32 %y) {entry: ret void} - define void @umul_with_overflow(i32 %lhs, i32 %rhs, i1* %pcarry_flag) { ret void } + define void @umul_with_overflow(i32 %lhs, i32 %rhs, i32* %pmul, i1* %pcarry_flag) { ret void } ... --- @@ -20,7 +20,7 @@ body: | ; MIPS32: liveins: $a0, $a1 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1 - ; MIPS32: [[MUL:%[0-9]+]]:gpr32 = MUL [[COPY]], [[COPY1]], implicit-def $hi0, implicit-def $lo0 + ; MIPS32: [[MUL:%[0-9]+]]:gpr32 = MUL [[COPY]], [[COPY1]], implicit-def dead $hi0, implicit-def dead $lo0 ; MIPS32: $v0 = COPY [[MUL]] ; MIPS32: RetRA implicit $v0 %0:gprb(s32) = COPY $a0 @@ -38,13 +38,15 @@ regBankSelected: true tracksRegLiveness: true body: | bb.1 (%ir-block.0): - liveins: $a0, $a1, $a2 + liveins: $a0, $a1, $a2, $a3 ; MIPS32-LABEL: name: umul_with_overflow - ; MIPS32: liveins: $a0, $a1, $a2 + ; MIPS32: liveins: $a0, $a1, $a2, $a3 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1 ; MIPS32: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2 + ; MIPS32: [[COPY3:%[0-9]+]]:gpr32 = COPY $a3 + ; MIPS32: [[MUL:%[0-9]+]]:gpr32 = MUL [[COPY]], [[COPY1]], implicit-def dead $hi0, implicit-def dead $lo0 ; MIPS32: [[PseudoMULTu:%[0-9]+]]:acc64 = PseudoMULTu [[COPY]], [[COPY1]] ; MIPS32: [[PseudoMFHI:%[0-9]+]]:gpr32 = PseudoMFHI [[PseudoMULTu]] ; MIPS32: [[LUi:%[0-9]+]]:gpr32 = LUi 0 @@ -54,18 +56,22 @@ body: | ; MIPS32: [[LUi1:%[0-9]+]]:gpr32 = LUi 0 ; MIPS32: [[ORi1:%[0-9]+]]:gpr32 = ORi [[LUi1]], 1 ; MIPS32: [[AND:%[0-9]+]]:gpr32 = AND [[SLTu]], [[ORi1]] - ; MIPS32: SB [[AND]], [[COPY2]], 0 :: (store 1 into %ir.pcarry_flag) + ; MIPS32: SB [[AND]], [[COPY3]], 0 :: (store 1 into %ir.pcarry_flag) + ; MIPS32: SW [[MUL]], [[COPY2]], 0 :: (store 4 into %ir.pmul) ; MIPS32: RetRA %0:gprb(s32) = COPY $a0 %1:gprb(s32) = COPY $a1 %2:gprb(p0) = COPY $a2 - %6:gprb(s32) = G_UMULH %0, %1 - %7:gprb(s32) = G_CONSTANT i32 0 - %8:gprb(s32) = G_ICMP intpred(ne), %6(s32), %7 - %9:gprb(s32) = G_CONSTANT i32 1 - %10:gprb(s32) = COPY %8(s32) - %5:gprb(s32) = G_AND %10, %9 - G_STORE %5(s32), %2(p0) :: (store 1 into %ir.pcarry_flag) + %3:gprb(p0) = COPY $a3 + %4:gprb(s32) = G_MUL %0, %1 + %7:gprb(s32) = G_UMULH %0, %1 + %8:gprb(s32) = G_CONSTANT i32 0 + %9:gprb(s32) = G_ICMP intpred(ne), %7(s32), %8 + %10:gprb(s32) = G_CONSTANT i32 1 + %11:gprb(s32) = COPY %9(s32) + %6:gprb(s32) = G_AND %11, %10 + G_STORE %6(s32), %3(p0) :: (store 1 into %ir.pcarry_flag) + G_STORE %4(s32), %2(p0) :: (store 4 into %ir.pmul) RetRA ... |
