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-rw-r--r--llvm/test/CodeGen/Hexagon/inline-asm-a.ll16
1 files changed, 16 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Hexagon/inline-asm-a.ll b/llvm/test/CodeGen/Hexagon/inline-asm-a.ll
new file mode 100644
index 00000000000..08862d9233a
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/inline-asm-a.ll
@@ -0,0 +1,16 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+
+; Check that constraint a is handled correctly.
+; CHECK: [[M:m[01]]] = r1
+; CHECK: memw(r0++[[M]]) = r2
+
+target triple = "hexagon"
+
+; Function Attrs: nounwind
+define void @foo(i32* %a, i32 %m, i32 %v) #0 {
+entry:
+ tail call void asm sideeffect "memw($0++$1) = $2", "r,a,r,~{memory}"(i32* %a, i32 %m, i32 %v)
+ ret void
+}
+
+attributes #0 = { nounwind "target-cpu"="hexagonv60" }
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