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-rw-r--r--llvm/test/CodeGen/Hexagon/autohvx/isel-extractelt-illegal-type.ll2
-rw-r--r--llvm/test/CodeGen/Hexagon/swp-const-tc1.ll2
2 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/Hexagon/autohvx/isel-extractelt-illegal-type.ll b/llvm/test/CodeGen/Hexagon/autohvx/isel-extractelt-illegal-type.ll
index 2e915e017f5..cc44c149ca7 100644
--- a/llvm/test/CodeGen/Hexagon/autohvx/isel-extractelt-illegal-type.ll
+++ b/llvm/test/CodeGen/Hexagon/autohvx/isel-extractelt-illegal-type.ll
@@ -21,7 +21,7 @@ b0:
%v7 = tail call i32 @llvm.hexagon.A2.subh.l16.sat.ll(i32 %v6, i32 16)
%v8 = trunc i32 %v7 to i16
%v9 = icmp sgt i16 %v8, -1
- %v10 = select i1 %v9, i16 0, i16 undef
+ %v10 = select i1 %v9, i16 0, i16 1
ret i16 %v10
}
diff --git a/llvm/test/CodeGen/Hexagon/swp-const-tc1.ll b/llvm/test/CodeGen/Hexagon/swp-const-tc1.ll
index 26ad82a20c4..4cc6afce497 100644
--- a/llvm/test/CodeGen/Hexagon/swp-const-tc1.ll
+++ b/llvm/test/CodeGen/Hexagon/swp-const-tc1.ll
@@ -34,7 +34,7 @@ b3: ; preds = %b3, %b2
%v7 = add i32 %v6, undef
%v8 = icmp slt i32 undef, %v7
%v9 = add nsw i32 %v7, 1
- %v10 = select i1 undef, i32 undef, i32 %v9
+ %v10 = select i1 undef, i32 1, i32 %v9
%v11 = add i32 %v10, 0
%v12 = getelementptr inbounds i8, i8* null, i32 %v11
%v13 = load i8, i8* %v12, align 1, !tbaa !4
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