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-rw-r--r--llvm/test/CodeGen/Hexagon/isel-bitcast-v8i8-v4i16.ll13
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Hexagon/isel-bitcast-v8i8-v4i16.ll b/llvm/test/CodeGen/Hexagon/isel-bitcast-v8i8-v4i16.ll
new file mode 100644
index 00000000000..f45b1a77c6d
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/isel-bitcast-v8i8-v4i16.ll
@@ -0,0 +1,13 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+
+; Check that this doesn't fail to select instructions.
+; CHECK: vsplath
+
+define <8 x i8> @fred(i16 %a0) #0 {
+ %t0 = insertelement <4 x i16> undef, i16 %a0, i32 0
+ %t1 = shufflevector <4 x i16> %t0, <4 x i16> undef, <4 x i32> zeroinitializer
+ %t2 = bitcast <4 x i16> %t1 to <8 x i8>
+ ret <8 x i8> %t2
+}
+
+attributes #0 = { readnone nounwind "target-cpu"="hexagonv62" }
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