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-rw-r--r--llvm/test/CodeGen/Hexagon/early-if-merge-loop.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/Hexagon/early-if-merge-loop.ll b/llvm/test/CodeGen/Hexagon/early-if-merge-loop.ll
index f45058f029d..ab8b00d6c90 100644
--- a/llvm/test/CodeGen/Hexagon/early-if-merge-loop.ll
+++ b/llvm/test/CodeGen/Hexagon/early-if-merge-loop.ll
@@ -82,7 +82,7 @@ declare i64 @llvm.hexagon.A2.addp(i64, i64) #1
declare i64 @llvm.hexagon.A2.subp(i64, i64) #1
declare i64 @llvm.hexagon.A2.combinew(i32, i32) #1
-attributes #0 = { nounwind readonly "target-cpu"="hexagonv60" "target-features"="-hvx,-hvx-double,-long-calls" }
+attributes #0 = { nounwind readonly "target-cpu"="hexagonv60" "target-features"="-hvx,-long-calls" }
attributes #1 = { nounwind readnone }
!0 = !{!1, !1, i64 0}
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