diff options
Diffstat (limited to 'llvm/test/CodeGen/ARM64')
| -rw-r--r-- | llvm/test/CodeGen/ARM64/abi_align.ll | 4 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM64/fast-isel-conversion.ll | 4 |
2 files changed, 5 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/ARM64/abi_align.ll b/llvm/test/CodeGen/ARM64/abi_align.ll index 13a2a394f39..44c5a07ce39 100644 --- a/llvm/test/CodeGen/ARM64/abi_align.ll +++ b/llvm/test/CodeGen/ARM64/abi_align.ll @@ -490,7 +490,9 @@ entry: ; FAST: sub sp, sp, #48 ; FAST: mov x[[ADDR:[0-9]+]], sp ; FAST: str {{w[0-9]+}}, [x[[ADDR]], #16] -; FAST: stp {{x[0-9]+}}, {{x[0-9]+}}, [x[[ADDR]]] +; Load/Store opt is disabled with -O0, so the i128 is split. +; FAST: str {{x[0-9]+}}, [x[[ADDR]], #8] +; FAST: str {{x[0-9]+}}, [x[[ADDR]]] %0 = load i128* bitcast (%struct.s41* @g41 to i128*), align 16 %call = tail call i32 @callee_i128_split(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i128 %0, i32 8) #5 diff --git a/llvm/test/CodeGen/ARM64/fast-isel-conversion.ll b/llvm/test/CodeGen/ARM64/fast-isel-conversion.ll index 067979dd3d4..c5417de0ae9 100644 --- a/llvm/test/CodeGen/ARM64/fast-isel-conversion.ll +++ b/llvm/test/CodeGen/ARM64/fast-isel-conversion.ll @@ -60,7 +60,7 @@ entry: ; CHECK: mov x3, x0 ; CHECK: ubfx x3, x3, #0, #32 ; CHECK: str x3, [sp] -; CHECK: ldr x0, [sp], #16 +; CHECK: ldr x0, [sp] ; CHECK: ret %a.addr = alloca i8, align 1 %b.addr = alloca i16, align 2 @@ -117,7 +117,7 @@ entry: ; CHECK: mov x3, x0 ; CHECK: sxtw x3, w3 ; CHECK: str x3, [sp] -; CHECK: ldr x0, [sp], #16 +; CHECK: ldr x0, [sp] ; CHECK: ret %a.addr = alloca i8, align 1 %b.addr = alloca i16, align 2 |
