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-rw-r--r--llvm/test/CodeGen/ARM/machine-sink-multidef.ll56
1 files changed, 56 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/machine-sink-multidef.ll b/llvm/test/CodeGen/ARM/machine-sink-multidef.ll
new file mode 100644
index 00000000000..81be7283624
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/machine-sink-multidef.ll
@@ -0,0 +1,56 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=arm-none-eabi | FileCheck %s
+
+%struct.anon.1.19.23.27.35.49.55.57.59.61.89.95 = type { i32, i32 }
+
+@e = external constant [2 x %struct.anon.1.19.23.27.35.49.55.57.59.61.89.95], align 4
+@f = external global i32, align 4
+
+define arm_aapcscc void @g() {
+; CHECK-LABEL: g:
+; CHECK: @ %bb.0: @ %entry
+; CHECK-NEXT: .save {r11, lr}
+; CHECK-NEXT: push {r11, lr}
+; CHECK-NEXT: ldr r0, .LCPI0_0
+; CHECK-NEXT: mov r2, #0
+; CHECK-NEXT: ldr r1, .LCPI0_1
+; CHECK-NEXT: cmp r2, #0
+; CHECK-NEXT: ldr r0, [r0]
+; CHECK-NEXT: ldr r0, [r1, r0, lsl #3]!
+; CHECK-NEXT: moveq r0, #0
+; CHECK-NEXT: cmp r2, #0
+; CHECK-NEXT: popne {r11, lr}
+; CHECK-NEXT: movne pc, lr
+; CHECK-NEXT: ldr r1, [r1, #4]
+; CHECK-NEXT: bl k
+; CHECK-NEXT: .p2align 2
+; CHECK-NEXT: @ %bb.1:
+; CHECK-NEXT: .LCPI0_0:
+; CHECK-NEXT: .long f
+; CHECK-NEXT: .LCPI0_1:
+; CHECK-NEXT: .long e
+entry:
+ %0 = load i32, i32* @f, align 4
+ %c = getelementptr inbounds [2 x %struct.anon.1.19.23.27.35.49.55.57.59.61.89.95], [2 x %struct.anon.1.19.23.27.35.49.55.57.59.61.89.95]* @e, i32 0, i32 %0, i32 0
+ %1 = load i32, i32* %c, align 4
+ %d = getelementptr inbounds [2 x %struct.anon.1.19.23.27.35.49.55.57.59.61.89.95], [2 x %struct.anon.1.19.23.27.35.49.55.57.59.61.89.95]* @e, i32 0, i32 %0, i32 1
+ %2 = load i32, i32* %d, align 4
+ br i1 undef, label %land.lhs.true, label %if.end
+
+land.lhs.true: ; preds = %entry
+ br label %if.end
+
+if.end: ; preds = %land.lhs.true, %entry
+ %h.0 = phi i32 [ %1, %entry ], [ 0, %land.lhs.true ]
+ br i1 undef, label %if.end7, label %if.then5
+
+if.then5: ; preds = %if.end
+ %call6 = call arm_aapcscc i32 bitcast (i32 (...)* @k to i32 (i32, i32)*)(i32 %h.0, i32 %2)
+ unreachable
+
+if.end7: ; preds = %if.end
+ ret void
+}
+
+declare arm_aapcscc i32 @k(...)
+
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