1 files changed, 16 insertions, 38 deletions
diff --git a/llvm/test/CodeGen/ARM/illegal-bitfield-loadstore.ll b/llvm/test/CodeGen/ARM/illegal-bitfield-loadstore.ll
index ca4e4a51fe8..340b852b4c6 100644
--- a/llvm/test/CodeGen/ARM/illegal-bitfield-loadstore.ll
+++ b/llvm/test/CodeGen/ARM/illegal-bitfield-loadstore.ll
@@ -6,9 +6,7 @@ define void @i24_or(i24* %a) {
 ; LE-LABEL: i24_or:
 ; LE:       @ BB#0:
 ; LE-NEXT:    ldrh r1, [r0]
-; LE-NEXT:    ldrb r2, [r0, #2]
 ; LE-NEXT:    orr r1, r1, #384
-; LE-NEXT:    strb r2, [r0, #2]
 ; LE-NEXT:    strh r1, [r0]
 ; LE-NEXT:    mov pc, lr
 ;
@@ -114,14 +112,9 @@ define void @i24_insert_bit(i24* %a, i1 zeroext %bit) {
 define void @i56_or(i56* %a) {
 ; LE-LABEL: i56_or:
 ; LE:       @ BB#0:
-; LE-NEXT:    mov r2, r0
-; LE-NEXT:    ldr r12, [r0]
-; LE-NEXT:    ldrh r3, [r2, #4]!
-; LE-NEXT:    ldrb r1, [r2, #2]
-; LE-NEXT:    strb r1, [r2, #2]
-; LE-NEXT:    orr r1, r12, #384
+; LE-NEXT:    ldr r1, [r0]
+; LE-NEXT:    orr r1, r1, #384
 ; LE-NEXT:    str r1, [r0]
-; LE-NEXT:    strh r3, [r2]
 ; LE-NEXT:    mov pc, lr
 ;
 ; BE-LABEL: i56_or:
@@ -149,36 +142,29 @@ define void @i56_or(i56* %a) {
 define void @i56_and_or(i56* %a) {
 ; LE-LABEL: i56_and_or:
 ; LE:       @ BB#0:
-; LE-NEXT:    mov r2, r0
 ; LE-NEXT:    ldr r1, [r0]
-; LE-NEXT:    ldrh r12, [r2, #4]!
 ; LE-NEXT:    orr r1, r1, #384
-; LE-NEXT:    ldrb r3, [r2, #2]
 ; LE-NEXT:    bic r1, r1, #127
-; LE-NEXT:    strb r3, [r2, #2]
 ; LE-NEXT:    str r1, [r0]
-; LE-NEXT:    strh r12, [r2]
 ; LE-NEXT:    mov pc, lr
 ;
 ; BE-LABEL: i56_and_or:
 ; BE:       @ BB#0:
-; BE-NEXT:    .save {r11, lr}
-; BE-NEXT:    push {r11, lr}
-; BE-NEXT:    mov r2, r0
-; BE-NEXT:    ldr lr, [r0]
+; BE-NEXT:    mov r1, r0
 ; BE-NEXT:    mov r3, #128
-; BE-NEXT:    ldrh r12, [r2, #4]!
-; BE-NEXT:    strb r3, [r2, #2]
-; BE-NEXT:    lsl r3, r12, #8
-; BE-NEXT:    orr r3, r3, lr, lsl #24
-; BE-NEXT:    orr r3, r3, #384
-; BE-NEXT:    lsr r1, r3, #8
-; BE-NEXT:    strh r1, [r2]
-; BE-NEXT:    bic r1, lr, #255
-; BE-NEXT:    orr r1, r1, r3, lsr #24
+; BE-NEXT:    ldrh r2, [r1, #4]!
+; BE-NEXT:    strb r3, [r1, #2]
+; BE-NEXT:    lsl r2, r2, #8
+; BE-NEXT:    ldr r12, [r0]
+; BE-NEXT:    orr r2, r2, r12, lsl #24
+; BE-NEXT:    orr r2, r2, #384
+; BE-NEXT:    lsr r3, r2, #8
+; BE-NEXT:    strh r3, [r1]
+; BE-NEXT:    bic r1, r12, #255
+; BE-NEXT:    orr r1, r1, r2, lsr #24
 ; BE-NEXT:    str r1, [r0]
-; BE-NEXT:    pop {r11, lr}
 ; BE-NEXT:    mov pc, lr
+
   %b = load i56, i56* %a, align 1
   %c = and i56 %b, -128
   %d = or i56 %c, 384
@@ -189,18 +175,10 @@ define void @i56_and_or(i56* %a) {
 define void @i56_insert_bit(i56* %a, i1 zeroext %bit) {
 ; LE-LABEL: i56_insert_bit:
 ; LE:       @ BB#0:
-; LE-NEXT:    .save {r11, lr}
-; LE-NEXT:    push {r11, lr}
-; LE-NEXT:    mov r3, r0
-; LE-NEXT:    ldr lr, [r0]
-; LE-NEXT:    ldrh r12, [r3, #4]!
-; LE-NEXT:    ldrb r2, [r3, #2]
-; LE-NEXT:    strb r2, [r3, #2]
-; LE-NEXT:    bic r2, lr, #8192
+; LE-NEXT:    ldr r2, [r0]
+; LE-NEXT:    bic r2, r2, #8192
 ; LE-NEXT:    orr r1, r2, r1, lsl #13
 ; LE-NEXT:    str r1, [r0]
-; LE-NEXT:    strh r12, [r3]
-; LE-NEXT:    pop {r11, lr}
 ; LE-NEXT:    mov pc, lr
 ;
 ; BE-LABEL: i56_insert_bit: