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Diffstat (limited to 'llvm/test/CodeGen/ARM/hoist-and-by-const-from-shl-in-eqcmp-zero.ll')
-rw-r--r--llvm/test/CodeGen/ARM/hoist-and-by-const-from-shl-in-eqcmp-zero.ll966
1 files changed, 427 insertions, 539 deletions
diff --git a/llvm/test/CodeGen/ARM/hoist-and-by-const-from-shl-in-eqcmp-zero.ll b/llvm/test/CodeGen/ARM/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
index 331085fe767..b59c8a1d955 100644
--- a/llvm/test/CodeGen/ARM/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
+++ b/llvm/test/CodeGen/ARM/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
@@ -21,35 +21,43 @@ define i1 @scalar_i8_signbit_eq(i8 %x, i8 %y) nounwind {
; ARM-LABEL: scalar_i8_signbit_eq:
; ARM: @ %bb.0:
; ARM-NEXT: uxtb r1, r1
-; ARM-NEXT: mvn r2, #127
-; ARM-NEXT: and r0, r0, r2, lsl r1
; ARM-NEXT: uxtb r0, r0
-; ARM-NEXT: clz r0, r0
-; ARM-NEXT: lsr r0, r0, #5
+; ARM-NEXT: lsr r0, r0, r1
+; ARM-NEXT: mov r1, #1
+; ARM-NEXT: uxtb r0, r0
+; ARM-NEXT: eor r0, r1, r0, lsr #7
; ARM-NEXT: bx lr
;
; THUMB6-LABEL: scalar_i8_signbit_eq:
; THUMB6: @ %bb.0:
; THUMB6-NEXT: uxtb r1, r1
-; THUMB6-NEXT: movs r2, #127
-; THUMB6-NEXT: mvns r2, r2
-; THUMB6-NEXT: lsls r2, r1
-; THUMB6-NEXT: ands r2, r0
-; THUMB6-NEXT: uxtb r1, r2
+; THUMB6-NEXT: uxtb r0, r0
+; THUMB6-NEXT: lsrs r0, r1
+; THUMB6-NEXT: movs r1, #128
+; THUMB6-NEXT: ands r1, r0
; THUMB6-NEXT: rsbs r0, r1, #0
; THUMB6-NEXT: adcs r0, r1
; THUMB6-NEXT: bx lr
;
-; THUMB78-LABEL: scalar_i8_signbit_eq:
-; THUMB78: @ %bb.0:
-; THUMB78-NEXT: uxtb r1, r1
-; THUMB78-NEXT: mvn r2, #127
-; THUMB78-NEXT: lsl.w r1, r2, r1
-; THUMB78-NEXT: ands r0, r1
-; THUMB78-NEXT: uxtb r0, r0
-; THUMB78-NEXT: clz r0, r0
-; THUMB78-NEXT: lsrs r0, r0, #5
-; THUMB78-NEXT: bx lr
+; THUMB7-LABEL: scalar_i8_signbit_eq:
+; THUMB7: @ %bb.0:
+; THUMB7-NEXT: uxtb r1, r1
+; THUMB7-NEXT: uxtb r0, r0
+; THUMB7-NEXT: lsrs r0, r1
+; THUMB7-NEXT: movs r1, #1
+; THUMB7-NEXT: uxtb r0, r0
+; THUMB7-NEXT: eor.w r0, r1, r0, lsr #7
+; THUMB7-NEXT: bx lr
+;
+; THUMB8-LABEL: scalar_i8_signbit_eq:
+; THUMB8: @ %bb.0:
+; THUMB8-NEXT: uxtb r0, r0
+; THUMB8-NEXT: uxtb r1, r1
+; THUMB8-NEXT: lsrs r0, r1
+; THUMB8-NEXT: movs r1, #1
+; THUMB8-NEXT: uxtb r0, r0
+; THUMB8-NEXT: eor.w r0, r1, r0, lsr #7
+; THUMB8-NEXT: bx lr
%t0 = shl i8 128, %y
%t1 = and i8 %t0, %x
%res = icmp eq i8 %t1, 0
@@ -60,34 +68,39 @@ define i1 @scalar_i8_lowestbit_eq(i8 %x, i8 %y) nounwind {
; ARM-LABEL: scalar_i8_lowestbit_eq:
; ARM: @ %bb.0:
; ARM-NEXT: uxtb r1, r1
-; ARM-NEXT: mov r2, #1
-; ARM-NEXT: and r0, r0, r2, lsl r1
; ARM-NEXT: uxtb r0, r0
-; ARM-NEXT: clz r0, r0
-; ARM-NEXT: lsr r0, r0, #5
+; ARM-NEXT: mov r2, #1
+; ARM-NEXT: bic r0, r2, r0, lsr r1
; ARM-NEXT: bx lr
;
; THUMB6-LABEL: scalar_i8_lowestbit_eq:
; THUMB6: @ %bb.0:
; THUMB6-NEXT: uxtb r1, r1
-; THUMB6-NEXT: movs r2, #1
-; THUMB6-NEXT: lsls r2, r1
-; THUMB6-NEXT: ands r2, r0
-; THUMB6-NEXT: uxtb r1, r2
+; THUMB6-NEXT: uxtb r0, r0
+; THUMB6-NEXT: lsrs r0, r1
+; THUMB6-NEXT: movs r1, #1
+; THUMB6-NEXT: ands r1, r0
; THUMB6-NEXT: rsbs r0, r1, #0
; THUMB6-NEXT: adcs r0, r1
; THUMB6-NEXT: bx lr
;
-; THUMB78-LABEL: scalar_i8_lowestbit_eq:
-; THUMB78: @ %bb.0:
-; THUMB78-NEXT: uxtb r1, r1
-; THUMB78-NEXT: movs r2, #1
-; THUMB78-NEXT: lsl.w r1, r2, r1
-; THUMB78-NEXT: ands r0, r1
-; THUMB78-NEXT: uxtb r0, r0
-; THUMB78-NEXT: clz r0, r0
-; THUMB78-NEXT: lsrs r0, r0, #5
-; THUMB78-NEXT: bx lr
+; THUMB7-LABEL: scalar_i8_lowestbit_eq:
+; THUMB7: @ %bb.0:
+; THUMB7-NEXT: uxtb r1, r1
+; THUMB7-NEXT: uxtb r0, r0
+; THUMB7-NEXT: lsrs r0, r1
+; THUMB7-NEXT: movs r1, #1
+; THUMB7-NEXT: bic.w r0, r1, r0
+; THUMB7-NEXT: bx lr
+;
+; THUMB8-LABEL: scalar_i8_lowestbit_eq:
+; THUMB8: @ %bb.0:
+; THUMB8-NEXT: uxtb r0, r0
+; THUMB8-NEXT: uxtb r1, r1
+; THUMB8-NEXT: lsrs r0, r1
+; THUMB8-NEXT: movs r1, #1
+; THUMB8-NEXT: bic.w r0, r1, r0
+; THUMB8-NEXT: bx lr
%t0 = shl i8 1, %y
%t1 = and i8 %t0, %x
%res = icmp eq i8 %t1, 0
@@ -98,9 +111,9 @@ define i1 @scalar_i8_bitsinmiddle_eq(i8 %x, i8 %y) nounwind {
; ARM-LABEL: scalar_i8_bitsinmiddle_eq:
; ARM: @ %bb.0:
; ARM-NEXT: uxtb r1, r1
-; ARM-NEXT: mov r2, #24
-; ARM-NEXT: and r0, r0, r2, lsl r1
; ARM-NEXT: uxtb r0, r0
+; ARM-NEXT: mov r2, #24
+; ARM-NEXT: and r0, r2, r0, lsr r1
; ARM-NEXT: clz r0, r0
; ARM-NEXT: lsr r0, r0, #5
; ARM-NEXT: bx lr
@@ -108,24 +121,33 @@ define i1 @scalar_i8_bitsinmiddle_eq(i8 %x, i8 %y) nounwind {
; THUMB6-LABEL: scalar_i8_bitsinmiddle_eq:
; THUMB6: @ %bb.0:
; THUMB6-NEXT: uxtb r1, r1
-; THUMB6-NEXT: movs r2, #24
-; THUMB6-NEXT: lsls r2, r1
-; THUMB6-NEXT: ands r2, r0
-; THUMB6-NEXT: uxtb r1, r2
+; THUMB6-NEXT: uxtb r0, r0
+; THUMB6-NEXT: lsrs r0, r1
+; THUMB6-NEXT: movs r1, #24
+; THUMB6-NEXT: ands r1, r0
; THUMB6-NEXT: rsbs r0, r1, #0
; THUMB6-NEXT: adcs r0, r1
; THUMB6-NEXT: bx lr
;
-; THUMB78-LABEL: scalar_i8_bitsinmiddle_eq:
-; THUMB78: @ %bb.0:
-; THUMB78-NEXT: uxtb r1, r1
-; THUMB78-NEXT: movs r2, #24
-; THUMB78-NEXT: lsl.w r1, r2, r1
-; THUMB78-NEXT: ands r0, r1
-; THUMB78-NEXT: uxtb r0, r0
-; THUMB78-NEXT: clz r0, r0
-; THUMB78-NEXT: lsrs r0, r0, #5
-; THUMB78-NEXT: bx lr
+; THUMB7-LABEL: scalar_i8_bitsinmiddle_eq:
+; THUMB7: @ %bb.0:
+; THUMB7-NEXT: uxtb r1, r1
+; THUMB7-NEXT: uxtb r0, r0
+; THUMB7-NEXT: lsrs r0, r1
+; THUMB7-NEXT: and r0, r0, #24
+; THUMB7-NEXT: clz r0, r0
+; THUMB7-NEXT: lsrs r0, r0, #5
+; THUMB7-NEXT: bx lr
+;
+; THUMB8-LABEL: scalar_i8_bitsinmiddle_eq:
+; THUMB8: @ %bb.0:
+; THUMB8-NEXT: uxtb r0, r0
+; THUMB8-NEXT: uxtb r1, r1
+; THUMB8-NEXT: lsrs r0, r1
+; THUMB8-NEXT: and r0, r0, #24
+; THUMB8-NEXT: clz r0, r0
+; THUMB8-NEXT: lsrs r0, r0, #5
+; THUMB8-NEXT: bx lr
%t0 = shl i8 24, %y
%t1 = and i8 %t0, %x
%res = icmp eq i8 %t1, 0
@@ -135,57 +157,47 @@ define i1 @scalar_i8_bitsinmiddle_eq(i8 %x, i8 %y) nounwind {
; i16 scalar
define i1 @scalar_i16_signbit_eq(i16 %x, i16 %y) nounwind {
-; ARM6-LABEL: scalar_i16_signbit_eq:
-; ARM6: @ %bb.0:
-; ARM6-NEXT: ldr r2, .LCPI3_0
-; ARM6-NEXT: uxth r1, r1
-; ARM6-NEXT: and r0, r0, r2, lsl r1
-; ARM6-NEXT: uxth r0, r0
-; ARM6-NEXT: clz r0, r0
-; ARM6-NEXT: lsr r0, r0, #5
-; ARM6-NEXT: bx lr
-; ARM6-NEXT: .p2align 2
-; ARM6-NEXT: @ %bb.1:
-; ARM6-NEXT: .LCPI3_0:
-; ARM6-NEXT: .long 4294934528 @ 0xffff8000
-;
-; ARM78-LABEL: scalar_i16_signbit_eq:
-; ARM78: @ %bb.0:
-; ARM78-NEXT: movw r2, #32768
-; ARM78-NEXT: uxth r1, r1
-; ARM78-NEXT: movt r2, #65535
-; ARM78-NEXT: and r0, r0, r2, lsl r1
-; ARM78-NEXT: uxth r0, r0
-; ARM78-NEXT: clz r0, r0
-; ARM78-NEXT: lsr r0, r0, #5
-; ARM78-NEXT: bx lr
+; ARM-LABEL: scalar_i16_signbit_eq:
+; ARM: @ %bb.0:
+; ARM-NEXT: uxth r1, r1
+; ARM-NEXT: uxth r0, r0
+; ARM-NEXT: lsr r0, r0, r1
+; ARM-NEXT: mov r1, #1
+; ARM-NEXT: uxth r0, r0
+; ARM-NEXT: eor r0, r1, r0, lsr #15
+; ARM-NEXT: bx lr
;
; THUMB6-LABEL: scalar_i16_signbit_eq:
; THUMB6: @ %bb.0:
; THUMB6-NEXT: uxth r1, r1
-; THUMB6-NEXT: ldr r2, .LCPI3_0
-; THUMB6-NEXT: lsls r2, r1
-; THUMB6-NEXT: ands r2, r0
-; THUMB6-NEXT: uxth r1, r2
+; THUMB6-NEXT: uxth r0, r0
+; THUMB6-NEXT: lsrs r0, r1
+; THUMB6-NEXT: movs r1, #1
+; THUMB6-NEXT: lsls r1, r1, #15
+; THUMB6-NEXT: ands r1, r0
; THUMB6-NEXT: rsbs r0, r1, #0
; THUMB6-NEXT: adcs r0, r1
; THUMB6-NEXT: bx lr
-; THUMB6-NEXT: .p2align 2
-; THUMB6-NEXT: @ %bb.1:
-; THUMB6-NEXT: .LCPI3_0:
-; THUMB6-NEXT: .long 4294934528 @ 0xffff8000
;
-; THUMB78-LABEL: scalar_i16_signbit_eq:
-; THUMB78: @ %bb.0:
-; THUMB78-NEXT: movw r2, #32768
-; THUMB78-NEXT: uxth r1, r1
-; THUMB78-NEXT: movt r2, #65535
-; THUMB78-NEXT: lsl.w r1, r2, r1
-; THUMB78-NEXT: ands r0, r1
-; THUMB78-NEXT: uxth r0, r0
-; THUMB78-NEXT: clz r0, r0
-; THUMB78-NEXT: lsrs r0, r0, #5
-; THUMB78-NEXT: bx lr
+; THUMB7-LABEL: scalar_i16_signbit_eq:
+; THUMB7: @ %bb.0:
+; THUMB7-NEXT: uxth r1, r1
+; THUMB7-NEXT: uxth r0, r0
+; THUMB7-NEXT: lsrs r0, r1
+; THUMB7-NEXT: movs r1, #1
+; THUMB7-NEXT: uxth r0, r0
+; THUMB7-NEXT: eor.w r0, r1, r0, lsr #15
+; THUMB7-NEXT: bx lr
+;
+; THUMB8-LABEL: scalar_i16_signbit_eq:
+; THUMB8: @ %bb.0:
+; THUMB8-NEXT: uxth r0, r0
+; THUMB8-NEXT: uxth r1, r1
+; THUMB8-NEXT: lsrs r0, r1
+; THUMB8-NEXT: movs r1, #1
+; THUMB8-NEXT: uxth r0, r0
+; THUMB8-NEXT: eor.w r0, r1, r0, lsr #15
+; THUMB8-NEXT: bx lr
%t0 = shl i16 32768, %y
%t1 = and i16 %t0, %x
%res = icmp eq i16 %t1, 0
@@ -196,34 +208,39 @@ define i1 @scalar_i16_lowestbit_eq(i16 %x, i16 %y) nounwind {
; ARM-LABEL: scalar_i16_lowestbit_eq:
; ARM: @ %bb.0:
; ARM-NEXT: uxth r1, r1
-; ARM-NEXT: mov r2, #1
-; ARM-NEXT: and r0, r0, r2, lsl r1
; ARM-NEXT: uxth r0, r0
-; ARM-NEXT: clz r0, r0
-; ARM-NEXT: lsr r0, r0, #5
+; ARM-NEXT: mov r2, #1
+; ARM-NEXT: bic r0, r2, r0, lsr r1
; ARM-NEXT: bx lr
;
; THUMB6-LABEL: scalar_i16_lowestbit_eq:
; THUMB6: @ %bb.0:
; THUMB6-NEXT: uxth r1, r1
-; THUMB6-NEXT: movs r2, #1
-; THUMB6-NEXT: lsls r2, r1
-; THUMB6-NEXT: ands r2, r0
-; THUMB6-NEXT: uxth r1, r2
+; THUMB6-NEXT: uxth r0, r0
+; THUMB6-NEXT: lsrs r0, r1
+; THUMB6-NEXT: movs r1, #1
+; THUMB6-NEXT: ands r1, r0
; THUMB6-NEXT: rsbs r0, r1, #0
; THUMB6-NEXT: adcs r0, r1
; THUMB6-NEXT: bx lr
;
-; THUMB78-LABEL: scalar_i16_lowestbit_eq:
-; THUMB78: @ %bb.0:
-; THUMB78-NEXT: uxth r1, r1
-; THUMB78-NEXT: movs r2, #1
-; THUMB78-NEXT: lsl.w r1, r2, r1
-; THUMB78-NEXT: ands r0, r1
-; THUMB78-NEXT: uxth r0, r0
-; THUMB78-NEXT: clz r0, r0
-; THUMB78-NEXT: lsrs r0, r0, #5
-; THUMB78-NEXT: bx lr
+; THUMB7-LABEL: scalar_i16_lowestbit_eq:
+; THUMB7: @ %bb.0:
+; THUMB7-NEXT: uxth r1, r1
+; THUMB7-NEXT: uxth r0, r0
+; THUMB7-NEXT: lsrs r0, r1
+; THUMB7-NEXT: movs r1, #1
+; THUMB7-NEXT: bic.w r0, r1, r0
+; THUMB7-NEXT: bx lr
+;
+; THUMB8-LABEL: scalar_i16_lowestbit_eq:
+; THUMB8: @ %bb.0:
+; THUMB8-NEXT: uxth r0, r0
+; THUMB8-NEXT: uxth r1, r1
+; THUMB8-NEXT: lsrs r0, r1
+; THUMB8-NEXT: movs r1, #1
+; THUMB8-NEXT: bic.w r0, r1, r0
+; THUMB8-NEXT: bx lr
%t0 = shl i16 1, %y
%t1 = and i16 %t0, %x
%res = icmp eq i16 %t1, 0
@@ -234,9 +251,9 @@ define i1 @scalar_i16_bitsinmiddle_eq(i16 %x, i16 %y) nounwind {
; ARM-LABEL: scalar_i16_bitsinmiddle_eq:
; ARM: @ %bb.0:
; ARM-NEXT: uxth r1, r1
-; ARM-NEXT: mov r2, #4080
-; ARM-NEXT: and r0, r0, r2, lsl r1
; ARM-NEXT: uxth r0, r0
+; ARM-NEXT: mov r2, #4080
+; ARM-NEXT: and r0, r2, r0, lsr r1
; ARM-NEXT: clz r0, r0
; ARM-NEXT: lsr r0, r0, #5
; ARM-NEXT: bx lr
@@ -244,25 +261,34 @@ define i1 @scalar_i16_bitsinmiddle_eq(i16 %x, i16 %y) nounwind {
; THUMB6-LABEL: scalar_i16_bitsinmiddle_eq:
; THUMB6: @ %bb.0:
; THUMB6-NEXT: uxth r1, r1
-; THUMB6-NEXT: movs r2, #255
-; THUMB6-NEXT: lsls r2, r2, #4
-; THUMB6-NEXT: lsls r2, r1
-; THUMB6-NEXT: ands r2, r0
-; THUMB6-NEXT: uxth r1, r2
+; THUMB6-NEXT: uxth r0, r0
+; THUMB6-NEXT: lsrs r0, r1
+; THUMB6-NEXT: movs r1, #255
+; THUMB6-NEXT: lsls r1, r1, #4
+; THUMB6-NEXT: ands r1, r0
; THUMB6-NEXT: rsbs r0, r1, #0
; THUMB6-NEXT: adcs r0, r1
; THUMB6-NEXT: bx lr
;
-; THUMB78-LABEL: scalar_i16_bitsinmiddle_eq:
-; THUMB78: @ %bb.0:
-; THUMB78-NEXT: uxth r1, r1
-; THUMB78-NEXT: mov.w r2, #4080
-; THUMB78-NEXT: lsl.w r1, r2, r1
-; THUMB78-NEXT: ands r0, r1
-; THUMB78-NEXT: uxth r0, r0
-; THUMB78-NEXT: clz r0, r0
-; THUMB78-NEXT: lsrs r0, r0, #5
-; THUMB78-NEXT: bx lr
+; THUMB7-LABEL: scalar_i16_bitsinmiddle_eq:
+; THUMB7: @ %bb.0:
+; THUMB7-NEXT: uxth r1, r1
+; THUMB7-NEXT: uxth r0, r0
+; THUMB7-NEXT: lsrs r0, r1
+; THUMB7-NEXT: and r0, r0, #4080
+; THUMB7-NEXT: clz r0, r0
+; THUMB7-NEXT: lsrs r0, r0, #5
+; THUMB7-NEXT: bx lr
+;
+; THUMB8-LABEL: scalar_i16_bitsinmiddle_eq:
+; THUMB8: @ %bb.0:
+; THUMB8-NEXT: uxth r0, r0
+; THUMB8-NEXT: uxth r1, r1
+; THUMB8-NEXT: lsrs r0, r1
+; THUMB8-NEXT: and r0, r0, #4080
+; THUMB8-NEXT: clz r0, r0
+; THUMB8-NEXT: lsrs r0, r0, #5
+; THUMB8-NEXT: bx lr
%t0 = shl i16 4080, %y
%t1 = and i16 %t0, %x
%res = icmp eq i16 %t1, 0
@@ -274,29 +300,25 @@ define i1 @scalar_i16_bitsinmiddle_eq(i16 %x, i16 %y) nounwind {
define i1 @scalar_i32_signbit_eq(i32 %x, i32 %y) nounwind {
; ARM-LABEL: scalar_i32_signbit_eq:
; ARM: @ %bb.0:
-; ARM-NEXT: mov r2, #-2147483648
-; ARM-NEXT: and r0, r0, r2, lsl r1
-; ARM-NEXT: clz r0, r0
-; ARM-NEXT: lsr r0, r0, #5
+; ARM-NEXT: mvn r0, r0, lsr r1
+; ARM-NEXT: lsr r0, r0, #31
; ARM-NEXT: bx lr
;
; THUMB6-LABEL: scalar_i32_signbit_eq:
; THUMB6: @ %bb.0:
-; THUMB6-NEXT: movs r2, #1
-; THUMB6-NEXT: lsls r2, r2, #31
-; THUMB6-NEXT: lsls r2, r1
-; THUMB6-NEXT: ands r2, r0
-; THUMB6-NEXT: rsbs r0, r2, #0
-; THUMB6-NEXT: adcs r0, r2
+; THUMB6-NEXT: lsrs r0, r1
+; THUMB6-NEXT: movs r1, #1
+; THUMB6-NEXT: lsls r1, r1, #31
+; THUMB6-NEXT: ands r1, r0
+; THUMB6-NEXT: rsbs r0, r1, #0
+; THUMB6-NEXT: adcs r0, r1
; THUMB6-NEXT: bx lr
;
; THUMB78-LABEL: scalar_i32_signbit_eq:
; THUMB78: @ %bb.0:
-; THUMB78-NEXT: mov.w r2, #-2147483648
-; THUMB78-NEXT: lsl.w r1, r2, r1
-; THUMB78-NEXT: ands r0, r1
-; THUMB78-NEXT: clz r0, r0
-; THUMB78-NEXT: lsrs r0, r0, #5
+; THUMB78-NEXT: lsrs r0, r1
+; THUMB78-NEXT: mvns r0, r0
+; THUMB78-NEXT: lsrs r0, r0, #31
; THUMB78-NEXT: bx lr
%t0 = shl i32 2147483648, %y
%t1 = and i32 %t0, %x
@@ -308,27 +330,23 @@ define i1 @scalar_i32_lowestbit_eq(i32 %x, i32 %y) nounwind {
; ARM-LABEL: scalar_i32_lowestbit_eq:
; ARM: @ %bb.0:
; ARM-NEXT: mov r2, #1
-; ARM-NEXT: and r0, r0, r2, lsl r1
-; ARM-NEXT: clz r0, r0
-; ARM-NEXT: lsr r0, r0, #5
+; ARM-NEXT: bic r0, r2, r0, lsr r1
; ARM-NEXT: bx lr
;
; THUMB6-LABEL: scalar_i32_lowestbit_eq:
; THUMB6: @ %bb.0:
-; THUMB6-NEXT: movs r2, #1
-; THUMB6-NEXT: lsls r2, r1
-; THUMB6-NEXT: ands r2, r0
-; THUMB6-NEXT: rsbs r0, r2, #0
-; THUMB6-NEXT: adcs r0, r2
+; THUMB6-NEXT: lsrs r0, r1
+; THUMB6-NEXT: movs r1, #1
+; THUMB6-NEXT: ands r1, r0
+; THUMB6-NEXT: rsbs r0, r1, #0
+; THUMB6-NEXT: adcs r0, r1
; THUMB6-NEXT: bx lr
;
; THUMB78-LABEL: scalar_i32_lowestbit_eq:
; THUMB78: @ %bb.0:
-; THUMB78-NEXT: movs r2, #1
-; THUMB78-NEXT: lsl.w r1, r2, r1
-; THUMB78-NEXT: ands r0, r1
-; THUMB78-NEXT: clz r0, r0
-; THUMB78-NEXT: lsrs r0, r0, #5
+; THUMB78-NEXT: lsrs r0, r1
+; THUMB78-NEXT: movs r1, #1
+; THUMB78-NEXT: bic.w r0, r1, r0
; THUMB78-NEXT: bx lr
%t0 = shl i32 1, %y
%t1 = and i32 %t0, %x
@@ -341,7 +359,7 @@ define i1 @scalar_i32_bitsinmiddle_eq(i32 %x, i32 %y) nounwind {
; ARM6: @ %bb.0:
; ARM6-NEXT: mov r2, #65280
; ARM6-NEXT: orr r2, r2, #16711680
-; ARM6-NEXT: and r0, r0, r2, lsl r1
+; ARM6-NEXT: and r0, r2, r0, lsr r1
; ARM6-NEXT: clz r0, r0
; ARM6-NEXT: lsr r0, r0, #5
; ARM6-NEXT: bx lr
@@ -350,18 +368,18 @@ define i1 @scalar_i32_bitsinmiddle_eq(i32 %x, i32 %y) nounwind {
; ARM78: @ %bb.0:
; ARM78-NEXT: movw r2, #65280
; ARM78-NEXT: movt r2, #255
-; ARM78-NEXT: and r0, r0, r2, lsl r1
+; ARM78-NEXT: and r0, r2, r0, lsr r1
; ARM78-NEXT: clz r0, r0
; ARM78-NEXT: lsr r0, r0, #5
; ARM78-NEXT: bx lr
;
; THUMB6-LABEL: scalar_i32_bitsinmiddle_eq:
; THUMB6: @ %bb.0:
-; THUMB6-NEXT: ldr r2, .LCPI8_0
-; THUMB6-NEXT: lsls r2, r1
-; THUMB6-NEXT: ands r2, r0
-; THUMB6-NEXT: rsbs r0, r2, #0
-; THUMB6-NEXT: adcs r0, r2
+; THUMB6-NEXT: lsrs r0, r1
+; THUMB6-NEXT: ldr r1, .LCPI8_0
+; THUMB6-NEXT: ands r1, r0
+; THUMB6-NEXT: rsbs r0, r1, #0
+; THUMB6-NEXT: adcs r0, r1
; THUMB6-NEXT: bx lr
; THUMB6-NEXT: .p2align 2
; THUMB6-NEXT: @ %bb.1:
@@ -370,9 +388,9 @@ define i1 @scalar_i32_bitsinmiddle_eq(i32 %x, i32 %y) nounwind {
;
; THUMB78-LABEL: scalar_i32_bitsinmiddle_eq:
; THUMB78: @ %bb.0:
-; THUMB78-NEXT: movw r2, #65280
-; THUMB78-NEXT: movt r2, #255
-; THUMB78-NEXT: lsl.w r1, r2, r1
+; THUMB78-NEXT: lsrs r0, r1
+; THUMB78-NEXT: movw r1, #65280
+; THUMB78-NEXT: movt r1, #255
; THUMB78-NEXT: ands r0, r1
; THUMB78-NEXT: clz r0, r0
; THUMB78-NEXT: lsrs r0, r0, #5
@@ -388,52 +406,41 @@ define i1 @scalar_i32_bitsinmiddle_eq(i32 %x, i32 %y) nounwind {
define i1 @scalar_i64_signbit_eq(i64 %x, i64 %y) nounwind {
; ARM6-LABEL: scalar_i64_signbit_eq:
; ARM6: @ %bb.0:
-; ARM6-NEXT: mov r0, #-2147483648
-; ARM6-NEXT: lsl r0, r0, r2
-; ARM6-NEXT: subs r2, r2, #32
+; ARM6-NEXT: lsr r0, r1, r2
+; ARM6-NEXT: subs r1, r2, #32
; ARM6-NEXT: movpl r0, #0
-; ARM6-NEXT: and r0, r0, r1
-; ARM6-NEXT: clz r0, r0
-; ARM6-NEXT: lsr r0, r0, #5
+; ARM6-NEXT: mvn r0, r0
+; ARM6-NEXT: lsr r0, r0, #31
; ARM6-NEXT: bx lr
;
; ARM78-LABEL: scalar_i64_signbit_eq:
; ARM78: @ %bb.0:
-; ARM78-NEXT: mov r0, #-2147483648
-; ARM78-NEXT: lsl r0, r0, r2
-; ARM78-NEXT: subs r2, r2, #32
+; ARM78-NEXT: lsr r0, r1, r2
+; ARM78-NEXT: subs r1, r2, #32
; ARM78-NEXT: movwpl r0, #0
-; ARM78-NEXT: and r0, r0, r1
-; ARM78-NEXT: clz r0, r0
-; ARM78-NEXT: lsr r0, r0, #5
+; ARM78-NEXT: mvn r0, r0
+; ARM78-NEXT: lsr r0, r0, #31
; ARM78-NEXT: bx lr
;
; THUMB6-LABEL: scalar_i64_signbit_eq:
; THUMB6: @ %bb.0:
-; THUMB6-NEXT: push {r4, r5, r7, lr}
-; THUMB6-NEXT: mov r4, r1
-; THUMB6-NEXT: mov r5, r0
+; THUMB6-NEXT: push {r7, lr}
+; THUMB6-NEXT: bl __lshrdi3
; THUMB6-NEXT: movs r0, #1
-; THUMB6-NEXT: lsls r1, r0, #31
-; THUMB6-NEXT: movs r0, #0
-; THUMB6-NEXT: bl __ashldi3
-; THUMB6-NEXT: ands r1, r4
-; THUMB6-NEXT: ands r0, r5
-; THUMB6-NEXT: orrs r0, r1
-; THUMB6-NEXT: rsbs r1, r0, #0
-; THUMB6-NEXT: adcs r0, r1
-; THUMB6-NEXT: pop {r4, r5, r7, pc}
+; THUMB6-NEXT: lsls r2, r0, #31
+; THUMB6-NEXT: ands r2, r1
+; THUMB6-NEXT: rsbs r0, r2, #0
+; THUMB6-NEXT: adcs r0, r2
+; THUMB6-NEXT: pop {r7, pc}
;
; THUMB78-LABEL: scalar_i64_signbit_eq:
; THUMB78: @ %bb.0:
-; THUMB78-NEXT: mov.w r0, #-2147483648
-; THUMB78-NEXT: lsls r0, r2
-; THUMB78-NEXT: subs r2, #32
+; THUMB78-NEXT: lsr.w r0, r1, r2
+; THUMB78-NEXT: subs.w r1, r2, #32
; THUMB78-NEXT: it pl
; THUMB78-NEXT: movpl r0, #0
-; THUMB78-NEXT: ands r0, r1
-; THUMB78-NEXT: clz r0, r0
-; THUMB78-NEXT: lsrs r0, r0, #5
+; THUMB78-NEXT: mvns r0, r0
+; THUMB78-NEXT: lsrs r0, r0, #31
; THUMB78-NEXT: bx lr
%t0 = shl i64 9223372036854775808, %y
%t1 = and i64 %t0, %x
@@ -442,94 +449,53 @@ define i1 @scalar_i64_signbit_eq(i64 %x, i64 %y) nounwind {
}
define i1 @scalar_i64_lowestbit_eq(i64 %x, i64 %y) nounwind {
-; ARM6-LABEL: scalar_i64_lowestbit_eq:
-; ARM6: @ %bb.0:
-; ARM6-NEXT: push {r11, lr}
-; ARM6-NEXT: mov r12, #1
-; ARM6-NEXT: subs lr, r2, #32
-; ARM6-NEXT: lsl r3, r12, r2
-; ARM6-NEXT: rsb r2, r2, #32
-; ARM6-NEXT: movpl r3, #0
-; ARM6-NEXT: and r0, r3, r0
-; ARM6-NEXT: lsr r2, r12, r2
-; ARM6-NEXT: lslpl r2, r12, lr
-; ARM6-NEXT: and r1, r2, r1
-; ARM6-NEXT: orr r0, r0, r1
-; ARM6-NEXT: clz r0, r0
-; ARM6-NEXT: lsr r0, r0, #5
-; ARM6-NEXT: pop {r11, pc}
-;
-; ARM78-LABEL: scalar_i64_lowestbit_eq:
-; ARM78: @ %bb.0:
-; ARM78-NEXT: push {r11, lr}
-; ARM78-NEXT: mov r12, #1
-; ARM78-NEXT: subs lr, r2, #32
-; ARM78-NEXT: lsl r3, r12, r2
-; ARM78-NEXT: rsb r2, r2, #32
-; ARM78-NEXT: movwpl r3, #0
-; ARM78-NEXT: and r0, r3, r0
-; ARM78-NEXT: lsr r2, r12, r2
-; ARM78-NEXT: lslpl r2, r12, lr
-; ARM78-NEXT: and r1, r2, r1
-; ARM78-NEXT: orr r0, r0, r1
-; ARM78-NEXT: clz r0, r0
-; ARM78-NEXT: lsr r0, r0, #5
-; ARM78-NEXT: pop {r11, pc}
+; ARM-LABEL: scalar_i64_lowestbit_eq:
+; ARM: @ %bb.0:
+; ARM-NEXT: rsb r3, r2, #32
+; ARM-NEXT: lsr r0, r0, r2
+; ARM-NEXT: subs r2, r2, #32
+; ARM-NEXT: orr r0, r0, r1, lsl r3
+; ARM-NEXT: lsrpl r0, r1, r2
+; ARM-NEXT: mov r1, #1
+; ARM-NEXT: bic r0, r1, r0
+; ARM-NEXT: bx lr
;
; THUMB6-LABEL: scalar_i64_lowestbit_eq:
; THUMB6: @ %bb.0:
-; THUMB6-NEXT: push {r4, r5, r7, lr}
-; THUMB6-NEXT: mov r4, r1
-; THUMB6-NEXT: mov r5, r0
-; THUMB6-NEXT: movs r0, #1
-; THUMB6-NEXT: movs r1, #0
-; THUMB6-NEXT: bl __ashldi3
-; THUMB6-NEXT: ands r1, r4
-; THUMB6-NEXT: ands r0, r5
-; THUMB6-NEXT: orrs r0, r1
-; THUMB6-NEXT: rsbs r1, r0, #0
+; THUMB6-NEXT: push {r7, lr}
+; THUMB6-NEXT: bl __lshrdi3
+; THUMB6-NEXT: movs r1, #1
+; THUMB6-NEXT: ands r1, r0
+; THUMB6-NEXT: rsbs r0, r1, #0
; THUMB6-NEXT: adcs r0, r1
-; THUMB6-NEXT: pop {r4, r5, r7, pc}
+; THUMB6-NEXT: pop {r7, pc}
;
; THUMB7-LABEL: scalar_i64_lowestbit_eq:
; THUMB7: @ %bb.0:
-; THUMB7-NEXT: push {r7, lr}
; THUMB7-NEXT: rsb.w r3, r2, #32
-; THUMB7-NEXT: mov.w r12, #1
-; THUMB7-NEXT: subs.w lr, r2, #32
-; THUMB7-NEXT: lsl.w r2, r12, r2
-; THUMB7-NEXT: lsr.w r3, r12, r3
-; THUMB7-NEXT: it pl
-; THUMB7-NEXT: lslpl.w r3, r12, lr
+; THUMB7-NEXT: lsrs r0, r2
+; THUMB7-NEXT: subs r2, #32
+; THUMB7-NEXT: lsl.w r3, r1, r3
+; THUMB7-NEXT: orr.w r0, r0, r3
; THUMB7-NEXT: it pl
-; THUMB7-NEXT: movpl r2, #0
-; THUMB7-NEXT: ands r1, r3
-; THUMB7-NEXT: ands r0, r2
-; THUMB7-NEXT: orrs r0, r1
-; THUMB7-NEXT: clz r0, r0
-; THUMB7-NEXT: lsrs r0, r0, #5
-; THUMB7-NEXT: pop {r7, pc}
+; THUMB7-NEXT: lsrpl.w r0, r1, r2
+; THUMB7-NEXT: movs r1, #1
+; THUMB7-NEXT: bic.w r0, r1, r0
+; THUMB7-NEXT: bx lr
;
; THUMB8-LABEL: scalar_i64_lowestbit_eq:
; THUMB8: @ %bb.0:
-; THUMB8-NEXT: .save {r7, lr}
-; THUMB8-NEXT: push {r7, lr}
-; THUMB8-NEXT: subs.w r3, r2, #32
-; THUMB8-NEXT: mov.w r12, #1
-; THUMB8-NEXT: lsl.w lr, r12, r3
; THUMB8-NEXT: rsb.w r3, r2, #32
-; THUMB8-NEXT: lsl.w r2, r12, r2
-; THUMB8-NEXT: lsr.w r3, r12, r3
-; THUMB8-NEXT: it pl
-; THUMB8-NEXT: movpl r3, lr
-; THUMB8-NEXT: it pl
-; THUMB8-NEXT: movpl r2, #0
-; THUMB8-NEXT: ands r1, r3
-; THUMB8-NEXT: ands r0, r2
-; THUMB8-NEXT: orrs r0, r1
-; THUMB8-NEXT: clz r0, r0
-; THUMB8-NEXT: lsrs r0, r0, #5
-; THUMB8-NEXT: pop {r7, pc}
+; THUMB8-NEXT: lsrs r0, r2
+; THUMB8-NEXT: lsl.w r3, r1, r3
+; THUMB8-NEXT: orrs r0, r3
+; THUMB8-NEXT: subs r2, #32
+; THUMB8-NEXT: lsr.w r1, r1, r2
+; THUMB8-NEXT: it mi
+; THUMB8-NEXT: movmi r1, r0
+; THUMB8-NEXT: movs r0, #1
+; THUMB8-NEXT: bics r0, r1
+; THUMB8-NEXT: bx lr
%t0 = shl i64 1, %y
%t1 = and i64 %t0, %x
%res = icmp eq i64 %t1, 0
@@ -539,115 +505,82 @@ define i1 @scalar_i64_lowestbit_eq(i64 %x, i64 %y) nounwind {
define i1 @scalar_i64_bitsinmiddle_eq(i64 %x, i64 %y) nounwind {
; ARM6-LABEL: scalar_i64_bitsinmiddle_eq:
; ARM6: @ %bb.0:
-; ARM6-NEXT: push {r4, lr}
-; ARM6-NEXT: mov r12, #16711680
-; ARM6-NEXT: subs lr, r2, #32
-; ARM6-NEXT: orr r12, r12, #-16777216
-; ARM6-NEXT: mov r4, #255
-; ARM6-NEXT: orr r4, r4, #65280
-; ARM6-NEXT: lsl r3, r12, r2
-; ARM6-NEXT: movpl r3, #0
-; ARM6-NEXT: and r0, r3, r0
; ARM6-NEXT: rsb r3, r2, #32
-; ARM6-NEXT: cmp lr, #0
-; ARM6-NEXT: lsr r3, r12, r3
-; ARM6-NEXT: orr r2, r3, r4, lsl r2
-; ARM6-NEXT: lslpl r2, r12, lr
-; ARM6-NEXT: and r1, r2, r1
-; ARM6-NEXT: orr r0, r0, r1
+; ARM6-NEXT: lsr r0, r0, r2
+; ARM6-NEXT: orr r0, r0, r1, lsl r3
+; ARM6-NEXT: subs r3, r2, #32
+; ARM6-NEXT: lsrpl r0, r1, r3
+; ARM6-NEXT: lsr r1, r1, r2
+; ARM6-NEXT: movpl r1, #0
+; ARM6-NEXT: pkhbt r0, r1, r0
; ARM6-NEXT: clz r0, r0
; ARM6-NEXT: lsr r0, r0, #5
-; ARM6-NEXT: pop {r4, pc}
+; ARM6-NEXT: bx lr
;
; ARM78-LABEL: scalar_i64_bitsinmiddle_eq:
; ARM78: @ %bb.0:
-; ARM78-NEXT: push {r4, lr}
-; ARM78-NEXT: movw r12, #0
-; ARM78-NEXT: subs lr, r2, #32
-; ARM78-NEXT: movt r12, #65535
-; ARM78-NEXT: movw r4, #65535
-; ARM78-NEXT: lsl r3, r12, r2
-; ARM78-NEXT: movwpl r3, #0
-; ARM78-NEXT: and r0, r3, r0
; ARM78-NEXT: rsb r3, r2, #32
-; ARM78-NEXT: cmp lr, #0
-; ARM78-NEXT: lsr r3, r12, r3
-; ARM78-NEXT: orr r2, r3, r4, lsl r2
-; ARM78-NEXT: lslpl r2, r12, lr
-; ARM78-NEXT: and r1, r2, r1
-; ARM78-NEXT: orr r0, r0, r1
+; ARM78-NEXT: lsr r0, r0, r2
+; ARM78-NEXT: orr r0, r0, r1, lsl r3
+; ARM78-NEXT: subs r3, r2, #32
+; ARM78-NEXT: lsrpl r0, r1, r3
+; ARM78-NEXT: lsr r1, r1, r2
+; ARM78-NEXT: movwpl r1, #0
+; ARM78-NEXT: pkhbt r0, r1, r0
; ARM78-NEXT: clz r0, r0
; ARM78-NEXT: lsr r0, r0, #5
-; ARM78-NEXT: pop {r4, pc}
+; ARM78-NEXT: bx lr
;
; THUMB6-LABEL: scalar_i64_bitsinmiddle_eq:
; THUMB6: @ %bb.0:
-; THUMB6-NEXT: push {r4, r5, r7, lr}
-; THUMB6-NEXT: mov r4, r1
-; THUMB6-NEXT: mov r5, r0
-; THUMB6-NEXT: ldr r0, .LCPI11_0
-; THUMB6-NEXT: ldr r1, .LCPI11_1
-; THUMB6-NEXT: bl __ashldi3
-; THUMB6-NEXT: ands r1, r4
-; THUMB6-NEXT: ands r0, r5
-; THUMB6-NEXT: orrs r0, r1
-; THUMB6-NEXT: rsbs r1, r0, #0
+; THUMB6-NEXT: push {r7, lr}
+; THUMB6-NEXT: bl __lshrdi3
+; THUMB6-NEXT: ldr r2, .LCPI11_0
+; THUMB6-NEXT: ands r2, r0
+; THUMB6-NEXT: uxth r0, r1
+; THUMB6-NEXT: adds r1, r2, r0
+; THUMB6-NEXT: rsbs r0, r1, #0
; THUMB6-NEXT: adcs r0, r1
-; THUMB6-NEXT: pop {r4, r5, r7, pc}
+; THUMB6-NEXT: pop {r7, pc}
; THUMB6-NEXT: .p2align 2
; THUMB6-NEXT: @ %bb.1:
; THUMB6-NEXT: .LCPI11_0:
; THUMB6-NEXT: .long 4294901760 @ 0xffff0000
-; THUMB6-NEXT: .LCPI11_1:
-; THUMB6-NEXT: .long 65535 @ 0xffff
;
; THUMB7-LABEL: scalar_i64_bitsinmiddle_eq:
; THUMB7: @ %bb.0:
-; THUMB7-NEXT: push {r7, lr}
-; THUMB7-NEXT: movw r3, #65535
-; THUMB7-NEXT: movw lr, #0
-; THUMB7-NEXT: lsl.w r12, r3, r2
; THUMB7-NEXT: rsb.w r3, r2, #32
-; THUMB7-NEXT: movt lr, #65535
-; THUMB7-NEXT: lsr.w r3, lr, r3
-; THUMB7-NEXT: orr.w r12, r12, r3
+; THUMB7-NEXT: lsrs r0, r2
+; THUMB7-NEXT: lsl.w r3, r1, r3
+; THUMB7-NEXT: orrs r0, r3
; THUMB7-NEXT: subs.w r3, r2, #32
-; THUMB7-NEXT: lsl.w r2, lr, r2
; THUMB7-NEXT: it pl
-; THUMB7-NEXT: lslpl.w r12, lr, r3
+; THUMB7-NEXT: lsrpl.w r0, r1, r3
+; THUMB7-NEXT: lsr.w r1, r1, r2
; THUMB7-NEXT: it pl
-; THUMB7-NEXT: movpl r2, #0
-; THUMB7-NEXT: and.w r1, r1, r12
-; THUMB7-NEXT: ands r0, r2
-; THUMB7-NEXT: orrs r0, r1
+; THUMB7-NEXT: movpl r1, #0
+; THUMB7-NEXT: pkhbt r0, r1, r0
; THUMB7-NEXT: clz r0, r0
; THUMB7-NEXT: lsrs r0, r0, #5
-; THUMB7-NEXT: pop {r7, pc}
+; THUMB7-NEXT: bx lr
;
; THUMB8-LABEL: scalar_i64_bitsinmiddle_eq:
; THUMB8: @ %bb.0:
-; THUMB8-NEXT: .save {r7, lr}
-; THUMB8-NEXT: push {r7, lr}
-; THUMB8-NEXT: movw r3, #65535
-; THUMB8-NEXT: movw lr, #0
-; THUMB8-NEXT: lsl.w r12, r3, r2
; THUMB8-NEXT: rsb.w r3, r2, #32
-; THUMB8-NEXT: movt lr, #65535
-; THUMB8-NEXT: lsr.w r3, lr, r3
-; THUMB8-NEXT: orr.w r12, r12, r3
+; THUMB8-NEXT: lsrs r0, r2
+; THUMB8-NEXT: lsl.w r3, r1, r3
+; THUMB8-NEXT: orrs r0, r3
; THUMB8-NEXT: subs.w r3, r2, #32
-; THUMB8-NEXT: lsl.w r2, lr, r2
-; THUMB8-NEXT: lsl.w r3, lr, r3
+; THUMB8-NEXT: lsr.w r3, r1, r3
; THUMB8-NEXT: it mi
-; THUMB8-NEXT: movmi r3, r12
+; THUMB8-NEXT: movmi r3, r0
+; THUMB8-NEXT: lsr.w r0, r1, r2
; THUMB8-NEXT: it pl
-; THUMB8-NEXT: movpl r2, #0
-; THUMB8-NEXT: ands r1, r3
-; THUMB8-NEXT: ands r0, r2
-; THUMB8-NEXT: orrs r0, r1
+; THUMB8-NEXT: movpl r0, #0
+; THUMB8-NEXT: pkhbt r0, r0, r3
; THUMB8-NEXT: clz r0, r0
; THUMB8-NEXT: lsrs r0, r0, #5
-; THUMB8-NEXT: pop {r7, pc}
+; THUMB8-NEXT: bx lr
%t0 = shl i64 281474976645120, %y
%t1 = and i64 %t0, %x
%res = icmp eq i64 %t1, 0
@@ -664,32 +597,25 @@ define <4 x i1> @vec_4xi32_splat_eq(<4 x i32> %x, <4 x i32> %y) nounwind {
; ARM6-NEXT: push {r11, lr}
; ARM6-NEXT: ldr r12, [sp, #8]
; ARM6-NEXT: mov lr, #1
-; ARM6-NEXT: and r0, r0, lr, lsl r12
+; ARM6-NEXT: bic r0, lr, r0, lsr r12
; ARM6-NEXT: ldr r12, [sp, #12]
-; ARM6-NEXT: clz r0, r0
-; ARM6-NEXT: and r1, r1, lr, lsl r12
+; ARM6-NEXT: bic r1, lr, r1, lsr r12
; ARM6-NEXT: ldr r12, [sp, #16]
-; ARM6-NEXT: clz r1, r1
-; ARM6-NEXT: lsr r0, r0, #5
-; ARM6-NEXT: and r2, r2, lr, lsl r12
+; ARM6-NEXT: bic r2, lr, r2, lsr r12
; ARM6-NEXT: ldr r12, [sp, #20]
-; ARM6-NEXT: clz r2, r2
-; ARM6-NEXT: lsr r1, r1, #5
-; ARM6-NEXT: and r3, r3, lr, lsl r12
-; ARM6-NEXT: lsr r2, r2, #5
-; ARM6-NEXT: clz r3, r3
-; ARM6-NEXT: lsr r3, r3, #5
+; ARM6-NEXT: bic r3, lr, r3, lsr r12
; ARM6-NEXT: pop {r11, pc}
;
; ARM78-LABEL: vec_4xi32_splat_eq:
; ARM78: @ %bb.0:
-; ARM78-NEXT: vmov.i32 q8, #0x1
; ARM78-NEXT: mov r12, sp
-; ARM78-NEXT: vld1.64 {d18, d19}, [r12]
-; ARM78-NEXT: vshl.u32 q8, q8, q9
+; ARM78-NEXT: vld1.64 {d16, d17}, [r12]
; ARM78-NEXT: vmov d19, r2, r3
+; ARM78-NEXT: vneg.s32 q8, q8
; ARM78-NEXT: vmov d18, r0, r1
-; ARM78-NEXT: vtst.32 q8, q8, q9
+; ARM78-NEXT: vmov.i32 q10, #0x1
+; ARM78-NEXT: vshl.u32 q8, q9, q8
+; ARM78-NEXT: vtst.32 q8, q8, q10
; ARM78-NEXT: vmvn q8, q8
; ARM78-NEXT: vmovn.i32 d16, q8
; ARM78-NEXT: vmov r0, r1, d16
@@ -697,42 +623,40 @@ define <4 x i1> @vec_4xi32_splat_eq(<4 x i32> %x, <4 x i32> %y) nounwind {
;
; THUMB6-LABEL: vec_4xi32_splat_eq:
; THUMB6: @ %bb.0:
-; THUMB6-NEXT: push {r4, r5, r6, lr}
-; THUMB6-NEXT: ldr r5, [sp, #16]
+; THUMB6-NEXT: push {r4, r5, r7, lr}
+; THUMB6-NEXT: ldr r4, [sp, #16]
+; THUMB6-NEXT: lsrs r0, r4
; THUMB6-NEXT: movs r4, #1
-; THUMB6-NEXT: mov r6, r4
-; THUMB6-NEXT: lsls r6, r5
-; THUMB6-NEXT: ands r6, r0
-; THUMB6-NEXT: rsbs r0, r6, #0
-; THUMB6-NEXT: adcs r0, r6
+; THUMB6-NEXT: ands r0, r4
+; THUMB6-NEXT: rsbs r5, r0, #0
+; THUMB6-NEXT: adcs r0, r5
; THUMB6-NEXT: ldr r5, [sp, #20]
-; THUMB6-NEXT: mov r6, r4
-; THUMB6-NEXT: lsls r6, r5
-; THUMB6-NEXT: ands r6, r1
-; THUMB6-NEXT: rsbs r1, r6, #0
-; THUMB6-NEXT: adcs r1, r6
+; THUMB6-NEXT: lsrs r1, r5
+; THUMB6-NEXT: ands r1, r4
+; THUMB6-NEXT: rsbs r5, r1, #0
+; THUMB6-NEXT: adcs r1, r5
; THUMB6-NEXT: ldr r5, [sp, #24]
-; THUMB6-NEXT: mov r6, r4
-; THUMB6-NEXT: lsls r6, r5
-; THUMB6-NEXT: ands r6, r2
-; THUMB6-NEXT: rsbs r2, r6, #0
-; THUMB6-NEXT: adcs r2, r6
+; THUMB6-NEXT: lsrs r2, r5
+; THUMB6-NEXT: ands r2, r4
+; THUMB6-NEXT: rsbs r5, r2, #0
+; THUMB6-NEXT: adcs r2, r5
; THUMB6-NEXT: ldr r5, [sp, #28]
-; THUMB6-NEXT: lsls r4, r5
-; THUMB6-NEXT: ands r4, r3
-; THUMB6-NEXT: rsbs r3, r4, #0
+; THUMB6-NEXT: lsrs r3, r5
+; THUMB6-NEXT: ands r3, r4
+; THUMB6-NEXT: rsbs r4, r3, #0
; THUMB6-NEXT: adcs r3, r4
-; THUMB6-NEXT: pop {r4, r5, r6, pc}
+; THUMB6-NEXT: pop {r4, r5, r7, pc}
;
; THUMB78-LABEL: vec_4xi32_splat_eq:
; THUMB78: @ %bb.0:
-; THUMB78-NEXT: vmov.i32 q8, #0x1
; THUMB78-NEXT: mov r12, sp
-; THUMB78-NEXT: vld1.64 {d18, d19}, [r12]
-; THUMB78-NEXT: vshl.u32 q8, q8, q9
+; THUMB78-NEXT: vld1.64 {d16, d17}, [r12]
; THUMB78-NEXT: vmov d19, r2, r3
+; THUMB78-NEXT: vneg.s32 q8, q8
; THUMB78-NEXT: vmov d18, r0, r1
-; THUMB78-NEXT: vtst.32 q8, q8, q9
+; THUMB78-NEXT: vmov.i32 q10, #0x1
+; THUMB78-NEXT: vshl.u32 q8, q9, q8
+; THUMB78-NEXT: vtst.32 q8, q8, q10
; THUMB78-NEXT: vmvn q8, q8
; THUMB78-NEXT: vmovn.i32 d16, q8
; THUMB78-NEXT: vmov r0, r1, d16
@@ -748,20 +672,16 @@ define <4 x i1> @vec_4xi32_nonsplat_eq(<4 x i32> %x, <4 x i32> %y) nounwind {
; ARM6: @ %bb.0:
; ARM6-NEXT: ldr r12, [sp, #4]
; ARM6-NEXT: mov r0, #1
-; ARM6-NEXT: and r0, r1, r0, lsl r12
+; ARM6-NEXT: bic r1, r0, r1, lsr r12
; ARM6-NEXT: ldr r12, [sp, #8]
-; ARM6-NEXT: clz r0, r0
-; ARM6-NEXT: lsr r1, r0, #5
; ARM6-NEXT: mov r0, #65280
; ARM6-NEXT: orr r0, r0, #16711680
-; ARM6-NEXT: and r0, r2, r0, lsl r12
-; ARM6-NEXT: ldr r12, [sp, #12]
+; ARM6-NEXT: and r0, r0, r2, lsr r12
; ARM6-NEXT: clz r0, r0
; ARM6-NEXT: lsr r2, r0, #5
-; ARM6-NEXT: mov r0, #-2147483648
-; ARM6-NEXT: and r0, r3, r0, lsl r12
-; ARM6-NEXT: clz r0, r0
-; ARM6-NEXT: lsr r3, r0, #5
+; ARM6-NEXT: ldr r0, [sp, #12]
+; ARM6-NEXT: mvn r0, r3, lsr r0
+; ARM6-NEXT: lsr r3, r0, #31
; ARM6-NEXT: mov r0, #1
; ARM6-NEXT: bx lr
;
@@ -789,27 +709,26 @@ define <4 x i1> @vec_4xi32_nonsplat_eq(<4 x i32> %x, <4 x i32> %y) nounwind {
;
; THUMB6-LABEL: vec_4xi32_nonsplat_eq:
; THUMB6: @ %bb.0:
-; THUMB6-NEXT: push {r4, r5, r7, lr}
-; THUMB6-NEXT: ldr r4, [sp, #20]
+; THUMB6-NEXT: push {r4, lr}
+; THUMB6-NEXT: ldr r0, [sp, #12]
+; THUMB6-NEXT: lsrs r1, r0
; THUMB6-NEXT: movs r0, #1
-; THUMB6-NEXT: mov r5, r0
-; THUMB6-NEXT: lsls r5, r4
-; THUMB6-NEXT: ands r5, r1
-; THUMB6-NEXT: rsbs r1, r5, #0
-; THUMB6-NEXT: adcs r1, r5
-; THUMB6-NEXT: ldr r4, [sp, #24]
-; THUMB6-NEXT: ldr r5, .LCPI13_0
-; THUMB6-NEXT: lsls r5, r4
-; THUMB6-NEXT: ands r5, r2
-; THUMB6-NEXT: rsbs r2, r5, #0
-; THUMB6-NEXT: adcs r2, r5
+; THUMB6-NEXT: ands r1, r0
+; THUMB6-NEXT: rsbs r4, r1, #0
+; THUMB6-NEXT: adcs r1, r4
+; THUMB6-NEXT: ldr r4, [sp, #16]
+; THUMB6-NEXT: lsrs r2, r4
+; THUMB6-NEXT: ldr r4, .LCPI13_0
+; THUMB6-NEXT: ands r4, r2
+; THUMB6-NEXT: rsbs r2, r4, #0
+; THUMB6-NEXT: adcs r2, r4
+; THUMB6-NEXT: ldr r4, [sp, #20]
+; THUMB6-NEXT: lsrs r3, r4
; THUMB6-NEXT: lsls r4, r0, #31
-; THUMB6-NEXT: ldr r5, [sp, #28]
-; THUMB6-NEXT: lsls r4, r5
; THUMB6-NEXT: ands r4, r3
; THUMB6-NEXT: rsbs r3, r4, #0
; THUMB6-NEXT: adcs r3, r4
-; THUMB6-NEXT: pop {r4, r5, r7, pc}
+; THUMB6-NEXT: pop {r4, pc}
; THUMB6-NEXT: .p2align 2
; THUMB6-NEXT: @ %bb.1:
; THUMB6-NEXT: .LCPI13_0:
@@ -849,28 +768,23 @@ define <4 x i1> @vec_4xi32_nonsplat_undef0_eq(<4 x i32> %x, <4 x i32> %y) nounwi
; ARM6-NEXT: ldr r2, [sp, #12]
; ARM6-NEXT: mov lr, #1
; ARM6-NEXT: ldr r12, [sp, #8]
-; ARM6-NEXT: and r1, r1, lr, lsl r2
+; ARM6-NEXT: bic r1, lr, r1, lsr r2
; ARM6-NEXT: ldr r2, [sp, #20]
-; ARM6-NEXT: and r0, r0, lr, lsl r12
-; ARM6-NEXT: clz r1, r1
-; ARM6-NEXT: clz r0, r0
-; ARM6-NEXT: and r2, r3, lr, lsl r2
-; ARM6-NEXT: lsr r1, r1, #5
-; ARM6-NEXT: clz r2, r2
-; ARM6-NEXT: lsr r0, r0, #5
-; ARM6-NEXT: lsr r3, r2, #5
+; ARM6-NEXT: bic r0, lr, r0, lsr r12
+; ARM6-NEXT: bic r3, lr, r3, lsr r2
; ARM6-NEXT: mov r2, #1
; ARM6-NEXT: pop {r11, pc}
;
; ARM78-LABEL: vec_4xi32_nonsplat_undef0_eq:
; ARM78: @ %bb.0:
-; ARM78-NEXT: vmov.i32 q8, #0x1
; ARM78-NEXT: mov r12, sp
-; ARM78-NEXT: vld1.64 {d18, d19}, [r12]
-; ARM78-NEXT: vshl.u32 q8, q8, q9
+; ARM78-NEXT: vld1.64 {d16, d17}, [r12]
; ARM78-NEXT: vmov d19, r2, r3
+; ARM78-NEXT: vneg.s32 q8, q8
; ARM78-NEXT: vmov d18, r0, r1
-; ARM78-NEXT: vtst.32 q8, q8, q9
+; ARM78-NEXT: vmov.i32 q10, #0x1
+; ARM78-NEXT: vshl.u32 q8, q9, q8
+; ARM78-NEXT: vtst.32 q8, q8, q10
; ARM78-NEXT: vmvn q8, q8
; ARM78-NEXT: vmovn.i32 d16, q8
; ARM78-NEXT: vmov r0, r1, d16
@@ -878,37 +792,35 @@ define <4 x i1> @vec_4xi32_nonsplat_undef0_eq(<4 x i32> %x, <4 x i32> %y) nounwi
;
; THUMB6-LABEL: vec_4xi32_nonsplat_undef0_eq:
; THUMB6: @ %bb.0:
-; THUMB6-NEXT: push {r4, r5, r7, lr}
-; THUMB6-NEXT: ldr r4, [sp, #16]
+; THUMB6-NEXT: push {r4, lr}
+; THUMB6-NEXT: ldr r2, [sp, #8]
+; THUMB6-NEXT: lsrs r0, r2
; THUMB6-NEXT: movs r2, #1
-; THUMB6-NEXT: mov r5, r2
-; THUMB6-NEXT: lsls r5, r4
-; THUMB6-NEXT: ands r5, r0
-; THUMB6-NEXT: rsbs r0, r5, #0
-; THUMB6-NEXT: adcs r0, r5
+; THUMB6-NEXT: ands r0, r2
+; THUMB6-NEXT: rsbs r4, r0, #0
+; THUMB6-NEXT: adcs r0, r4
+; THUMB6-NEXT: ldr r4, [sp, #12]
+; THUMB6-NEXT: lsrs r1, r4
+; THUMB6-NEXT: ands r1, r2
+; THUMB6-NEXT: rsbs r4, r1, #0
+; THUMB6-NEXT: adcs r1, r4
; THUMB6-NEXT: ldr r4, [sp, #20]
-; THUMB6-NEXT: mov r5, r2
-; THUMB6-NEXT: lsls r5, r4
-; THUMB6-NEXT: ands r5, r1
-; THUMB6-NEXT: rsbs r1, r5, #0
-; THUMB6-NEXT: adcs r1, r5
-; THUMB6-NEXT: ldr r4, [sp, #28]
-; THUMB6-NEXT: mov r5, r2
-; THUMB6-NEXT: lsls r5, r4
-; THUMB6-NEXT: ands r5, r3
-; THUMB6-NEXT: rsbs r3, r5, #0
-; THUMB6-NEXT: adcs r3, r5
-; THUMB6-NEXT: pop {r4, r5, r7, pc}
+; THUMB6-NEXT: lsrs r3, r4
+; THUMB6-NEXT: ands r3, r2
+; THUMB6-NEXT: rsbs r4, r3, #0
+; THUMB6-NEXT: adcs r3, r4
+; THUMB6-NEXT: pop {r4, pc}
;
; THUMB78-LABEL: vec_4xi32_nonsplat_undef0_eq:
; THUMB78: @ %bb.0:
-; THUMB78-NEXT: vmov.i32 q8, #0x1
; THUMB78-NEXT: mov r12, sp
-; THUMB78-NEXT: vld1.64 {d18, d19}, [r12]
-; THUMB78-NEXT: vshl.u32 q8, q8, q9
+; THUMB78-NEXT: vld1.64 {d16, d17}, [r12]
; THUMB78-NEXT: vmov d19, r2, r3
+; THUMB78-NEXT: vneg.s32 q8, q8
; THUMB78-NEXT: vmov d18, r0, r1
-; THUMB78-NEXT: vtst.32 q8, q8, q9
+; THUMB78-NEXT: vmov.i32 q10, #0x1
+; THUMB78-NEXT: vshl.u32 q8, q9, q8
+; THUMB78-NEXT: vtst.32 q8, q8, q10
; THUMB78-NEXT: vmvn q8, q8
; THUMB78-NEXT: vmovn.i32 d16, q8
; THUMB78-NEXT: vmov r0, r1, d16
@@ -925,16 +837,10 @@ define <4 x i1> @vec_4xi32_nonsplat_undef1_eq(<4 x i32> %x, <4 x i32> %y) nounwi
; ARM6-NEXT: ldr r2, [sp, #12]
; ARM6-NEXT: mov lr, #1
; ARM6-NEXT: ldr r12, [sp, #8]
-; ARM6-NEXT: and r1, r1, lr, lsl r2
+; ARM6-NEXT: bic r1, lr, r1, lsr r2
; ARM6-NEXT: ldr r2, [sp, #20]
-; ARM6-NEXT: and r0, r0, lr, lsl r12
-; ARM6-NEXT: clz r1, r1
-; ARM6-NEXT: clz r0, r0
-; ARM6-NEXT: and r2, r3, lr, lsl r2
-; ARM6-NEXT: lsr r1, r1, #5
-; ARM6-NEXT: clz r2, r2
-; ARM6-NEXT: lsr r0, r0, #5
-; ARM6-NEXT: lsr r3, r2, #5
+; ARM6-NEXT: bic r0, lr, r0, lsr r12
+; ARM6-NEXT: bic r3, lr, r3, lsr r2
; ARM6-NEXT: pop {r11, pc}
;
; ARM78-LABEL: vec_4xi32_nonsplat_undef1_eq:
@@ -953,26 +859,24 @@ define <4 x i1> @vec_4xi32_nonsplat_undef1_eq(<4 x i32> %x, <4 x i32> %y) nounwi
;
; THUMB6-LABEL: vec_4xi32_nonsplat_undef1_eq:
; THUMB6: @ %bb.0:
-; THUMB6-NEXT: push {r4, r5, r7, lr}
-; THUMB6-NEXT: ldr r4, [sp, #16]
+; THUMB6-NEXT: push {r4, lr}
+; THUMB6-NEXT: ldr r2, [sp, #8]
+; THUMB6-NEXT: lsrs r0, r2
; THUMB6-NEXT: movs r2, #1
-; THUMB6-NEXT: mov r5, r2
-; THUMB6-NEXT: lsls r5, r4
-; THUMB6-NEXT: ands r5, r0
-; THUMB6-NEXT: rsbs r0, r5, #0
-; THUMB6-NEXT: adcs r0, r5
+; THUMB6-NEXT: ands r0, r2
+; THUMB6-NEXT: rsbs r4, r0, #0
+; THUMB6-NEXT: adcs r0, r4
+; THUMB6-NEXT: ldr r4, [sp, #12]
+; THUMB6-NEXT: lsrs r1, r4
+; THUMB6-NEXT: ands r1, r2
+; THUMB6-NEXT: rsbs r4, r1, #0
+; THUMB6-NEXT: adcs r1, r4
; THUMB6-NEXT: ldr r4, [sp, #20]
-; THUMB6-NEXT: mov r5, r2
-; THUMB6-NEXT: lsls r5, r4
-; THUMB6-NEXT: ands r5, r1
-; THUMB6-NEXT: rsbs r1, r5, #0
-; THUMB6-NEXT: adcs r1, r5
-; THUMB6-NEXT: ldr r4, [sp, #28]
-; THUMB6-NEXT: lsls r2, r4
-; THUMB6-NEXT: ands r2, r3
-; THUMB6-NEXT: rsbs r3, r2, #0
+; THUMB6-NEXT: lsrs r3, r4
+; THUMB6-NEXT: ands r3, r2
+; THUMB6-NEXT: rsbs r2, r3, #0
; THUMB6-NEXT: adcs r3, r2
-; THUMB6-NEXT: pop {r4, r5, r7, pc}
+; THUMB6-NEXT: pop {r4, pc}
;
; THUMB78-LABEL: vec_4xi32_nonsplat_undef1_eq:
; THUMB78: @ %bb.0:
@@ -999,16 +903,10 @@ define <4 x i1> @vec_4xi32_nonsplat_undef2_eq(<4 x i32> %x, <4 x i32> %y) nounwi
; ARM6-NEXT: ldr r2, [sp, #12]
; ARM6-NEXT: mov lr, #1
; ARM6-NEXT: ldr r12, [sp, #8]
-; ARM6-NEXT: and r1, r1, lr, lsl r2
+; ARM6-NEXT: bic r1, lr, r1, lsr r2
; ARM6-NEXT: ldr r2, [sp, #20]
-; ARM6-NEXT: and r0, r0, lr, lsl r12
-; ARM6-NEXT: clz r1, r1
-; ARM6-NEXT: clz r0, r0
-; ARM6-NEXT: and r2, r3, lr, lsl r2
-; ARM6-NEXT: lsr r1, r1, #5
-; ARM6-NEXT: clz r2, r2
-; ARM6-NEXT: lsr r0, r0, #5
-; ARM6-NEXT: lsr r3, r2, #5
+; ARM6-NEXT: bic r0, lr, r0, lsr r12
+; ARM6-NEXT: bic r3, lr, r3, lsr r2
; ARM6-NEXT: pop {r11, pc}
;
; ARM78-LABEL: vec_4xi32_nonsplat_undef2_eq:
@@ -1027,26 +925,24 @@ define <4 x i1> @vec_4xi32_nonsplat_undef2_eq(<4 x i32> %x, <4 x i32> %y) nounwi
;
; THUMB6-LABEL: vec_4xi32_nonsplat_undef2_eq:
; THUMB6: @ %bb.0:
-; THUMB6-NEXT: push {r4, r5, r7, lr}
-; THUMB6-NEXT: ldr r4, [sp, #16]
+; THUMB6-NEXT: push {r4, lr}
+; THUMB6-NEXT: ldr r2, [sp, #8]
+; THUMB6-NEXT: lsrs r0, r2
; THUMB6-NEXT: movs r2, #1
-; THUMB6-NEXT: mov r5, r2
-; THUMB6-NEXT: lsls r5, r4
-; THUMB6-NEXT: ands r5, r0
-; THUMB6-NEXT: rsbs r0, r5, #0
-; THUMB6-NEXT: adcs r0, r5
+; THUMB6-NEXT: ands r0, r2
+; THUMB6-NEXT: rsbs r4, r0, #0
+; THUMB6-NEXT: adcs r0, r4
+; THUMB6-NEXT: ldr r4, [sp, #12]
+; THUMB6-NEXT: lsrs r1, r4
+; THUMB6-NEXT: ands r1, r2
+; THUMB6-NEXT: rsbs r4, r1, #0
+; THUMB6-NEXT: adcs r1, r4
; THUMB6-NEXT: ldr r4, [sp, #20]
-; THUMB6-NEXT: mov r5, r2
-; THUMB6-NEXT: lsls r5, r4
-; THUMB6-NEXT: ands r5, r1
-; THUMB6-NEXT: rsbs r1, r5, #0
-; THUMB6-NEXT: adcs r1, r5
-; THUMB6-NEXT: ldr r4, [sp, #28]
-; THUMB6-NEXT: lsls r2, r4
-; THUMB6-NEXT: ands r2, r3
-; THUMB6-NEXT: rsbs r3, r2, #0
+; THUMB6-NEXT: lsrs r3, r4
+; THUMB6-NEXT: ands r3, r2
+; THUMB6-NEXT: rsbs r2, r3, #0
; THUMB6-NEXT: adcs r3, r2
-; THUMB6-NEXT: pop {r4, r5, r7, pc}
+; THUMB6-NEXT: pop {r4, pc}
;
; THUMB78-LABEL: vec_4xi32_nonsplat_undef2_eq:
; THUMB78: @ %bb.0:
@@ -1072,49 +968,41 @@ define <4 x i1> @vec_4xi32_nonsplat_undef2_eq(<4 x i32> %x, <4 x i32> %y) nounwi
;------------------------------------------------------------------------------;
define i1 @scalar_i8_signbit_ne(i8 %x, i8 %y) nounwind {
-; ARM6-LABEL: scalar_i8_signbit_ne:
-; ARM6: @ %bb.0:
-; ARM6-NEXT: uxtb r1, r1
-; ARM6-NEXT: mvn r2, #127
-; ARM6-NEXT: and r0, r0, r2, lsl r1
-; ARM6-NEXT: uxtb r0, r0
-; ARM6-NEXT: cmp r0, #0
-; ARM6-NEXT: movne r0, #1
-; ARM6-NEXT: bx lr
-;
-; ARM78-LABEL: scalar_i8_signbit_ne:
-; ARM78: @ %bb.0:
-; ARM78-NEXT: uxtb r1, r1
-; ARM78-NEXT: mvn r2, #127
-; ARM78-NEXT: and r0, r0, r2, lsl r1
-; ARM78-NEXT: uxtb r0, r0
-; ARM78-NEXT: cmp r0, #0
-; ARM78-NEXT: movwne r0, #1
-; ARM78-NEXT: bx lr
+; ARM-LABEL: scalar_i8_signbit_ne:
+; ARM: @ %bb.0:
+; ARM-NEXT: uxtb r1, r1
+; ARM-NEXT: uxtb r0, r0
+; ARM-NEXT: lsr r0, r0, r1
+; ARM-NEXT: uxtb r0, r0
+; ARM-NEXT: lsr r0, r0, #7
+; ARM-NEXT: bx lr
;
; THUMB6-LABEL: scalar_i8_signbit_ne:
; THUMB6: @ %bb.0:
; THUMB6-NEXT: uxtb r1, r1
-; THUMB6-NEXT: movs r2, #127
-; THUMB6-NEXT: mvns r2, r2
-; THUMB6-NEXT: lsls r2, r1
-; THUMB6-NEXT: ands r2, r0
-; THUMB6-NEXT: uxtb r0, r2
-; THUMB6-NEXT: subs r1, r0, #1
-; THUMB6-NEXT: sbcs r0, r1
+; THUMB6-NEXT: uxtb r0, r0
+; THUMB6-NEXT: lsrs r0, r1
+; THUMB6-NEXT: uxtb r0, r0
+; THUMB6-NEXT: lsrs r0, r0, #7
; THUMB6-NEXT: bx lr
;
-; THUMB78-LABEL: scalar_i8_signbit_ne:
-; THUMB78: @ %bb.0:
-; THUMB78-NEXT: uxtb r1, r1
-; THUMB78-NEXT: mvn r2, #127
-; THUMB78-NEXT: lsl.w r1, r2, r1
-; THUMB78-NEXT: ands r0, r1
-; THUMB78-NEXT: uxtb r0, r0
-; THUMB78-NEXT: cmp r0, #0
-; THUMB78-NEXT: it ne
-; THUMB78-NEXT: movne r0, #1
-; THUMB78-NEXT: bx lr
+; THUMB7-LABEL: scalar_i8_signbit_ne:
+; THUMB7: @ %bb.0:
+; THUMB7-NEXT: uxtb r1, r1
+; THUMB7-NEXT: uxtb r0, r0
+; THUMB7-NEXT: lsrs r0, r1
+; THUMB7-NEXT: uxtb r0, r0
+; THUMB7-NEXT: lsrs r0, r0, #7
+; THUMB7-NEXT: bx lr
+;
+; THUMB8-LABEL: scalar_i8_signbit_ne:
+; THUMB8: @ %bb.0:
+; THUMB8-NEXT: uxtb r0, r0
+; THUMB8-NEXT: uxtb r1, r1
+; THUMB8-NEXT: lsrs r0, r1
+; THUMB8-NEXT: uxtb r0, r0
+; THUMB8-NEXT: lsrs r0, r0, #7
+; THUMB8-NEXT: bx lr
%t0 = shl i8 128, %y
%t1 = and i8 %t0, %x
%res = icmp ne i8 %t1, 0 ; we are perfectly happy with 'ne' predicate
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