1 files changed, 0 insertions, 50 deletions
diff --git a/llvm/test/CodeGen/ARM/constantfp.ll b/llvm/test/CodeGen/ARM/constantfp.ll
index 0b431f47f50..b5aeadc05eb 100644
--- a/llvm/test/CodeGen/ARM/constantfp.ll
+++ b/llvm/test/CodeGen/ARM/constantfp.ll
@@ -11,9 +11,6 @@
 ; RUN: llc -mtriple=thumbv7meb -arm-execute-only -mcpu=cortex-m4 %s -o - \
 ; RUN: | FileCheck --check-prefix=CHECK-XO-FLOAT --check-prefix=CHECK-XO-DOUBLE-BE %s
 
-; RUN: llc -mtriple=thumbv7m -arm-execute-only -mcpu=cortex-m4 -relocation-model=ropi %s -o - \
-; RUN: | FileCheck --check-prefix=CHECK-XO-ROPI %s
-
 ; RUN: llc -mtriple=thumbv8m.main -mattr=fp-armv8 %s -o - \
 ; RUN: | FileCheck --check-prefix=CHECK-NO-XO %s
 
@@ -23,8 +20,6 @@
 ; RUN: llc -mtriple=thumbv8m.maineb -arm-execute-only -mattr=fp-armv8 %s -o - \
 ; RUN: | FileCheck --check-prefix=CHECK-XO-FLOAT --check-prefix=CHECK-XO-DOUBLE-BE %s
 
-; RUN: llc -mtriple=thumbv8m.main -arm-execute-only -mattr=fp-armv8 -relocation-model=ropi %s -o - \
-; RUN: | FileCheck --check-prefix=CHECK-XO-ROPI %s
 
 define arm_aapcs_vfpcc float @test_vmov_f32() {
 ; CHECK-LABEL: test_vmov_f32:
@@ -181,48 +176,3 @@ define arm_aapcs_vfpcc double @lower_const_f64_xo() {
 ; CHECK-XO-DOUBLE-BE-NOT: vldr
   ret double 3.140000e-01
 }
-
-; This is a target independent optimization, performed by the
-; DAG Combiner, which promotes floating point literals into
-; constant pools:
-;
-; (a cond b) ? 1.0f : 2.0f -> load (ConstPoolAddr + ((a cond b) ? 0 : 4)
-;
-; We need to make sure that the constant pools are placed in
-; the data section when generating execute-only code:
-
-define arm_aapcs_vfpcc float @lower_fpconst_select(float %f) {
-
-; CHECK-NO-XO-LABEL: lower_fpconst_select
-; CHECK-NO-XO: adr [[REG:r[0-9]+]], [[LABEL:.?LCPI[0-9]+_[0-9]+]]
-; CHECK-NO-XO: vldr {{s[0-9]+}}, {{[[]}}[[REG]]{{[]]}}
-; CHECK-NO-XO-NOT: .rodata
-; CHECK-NO-XO: [[LABEL]]:
-; CHECK-NO-XO: .long   1335165689
-; CHECK-NO-XO: .long   1307470632
-
-; CHECK-XO-FLOAT-LABEL: lower_fpconst_select
-; CHECK-XO-FLOAT: movw [[REG:r[0-9]+]], :lower16:[[LABEL:.?LCP[0-9]+_[0-9]+]]
-; CHECK-XO-FLOAT: movt [[REG]], :upper16:[[LABEL]]
-; CHECK-XO-FLOAT: vldr {{s[0-9]+}}, {{[[]}}[[REG]]{{[]]}}
-; CHECK-XO-FLOAT: .rodata
-; CHECK-XO-FLOAT-NOT: .text
-; CHECK-XO-FLOAT: [[LABEL]]:
-; CHECK-XO-FLOAT: .long   1335165689
-; CHECK-XO-FLOAT: .long   1307470632
-
-; CHECK-XO-ROPI-LABEL: lower_fpconst_select
-; CHECK-XO-ROPI: movw [[REG:r[0-9]+]], :lower16:([[LABEL1:.?LCP[0-9]+_[0-9]+]]-([[LABEL2:.?LPC[0-9]+_[0-9]+]]+4))
-; CHECK-XO-ROPI: movt [[REG]], :upper16:([[LABEL1]]-([[LABEL2]]+4))
-; CHECK-XO-ROPI: [[LABEL2]]:
-; CHECK-XO-ROPI: vldr {{s[0-9]+}}, {{[[]}}[[REG]]{{[]]}}
-; CHECK-XO-ROPI: .rodata
-; CHECK-XO-ROPI-NOT: .text
-; CHECK-XO-ROPI: [[LABEL1]]:
-; CHECK-XO-ROPI: .long   1335165689
-; CHECK-XO-ROPI: .long   1307470632
-
-  %cmp = fcmp nnan oeq float %f, 0.000000e+00
-  %sel = select i1 %cmp, float 5.000000e+08, float 5.000000e+09
-  ret float %sel
-}