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-rw-r--r--llvm/test/CodeGen/AMDGPU/vselect64.ll2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/vselect64.ll b/llvm/test/CodeGen/AMDGPU/vselect64.ll
index ef85ebe7899..4a043556516 100644
--- a/llvm/test/CodeGen/AMDGPU/vselect64.ll
+++ b/llvm/test/CodeGen/AMDGPU/vselect64.ll
@@ -5,7 +5,7 @@
; Make sure the vectors aren't being stored on the stack. We know they are
; being stored on the stack if the shaders uses at leat 10 registers.
; CHECK-NOT: {{\**}} MOV T{{[0-9][0-9]}}.X
-define void @test_select_v4i64(<4 x i64> addrspace(1)* %out, <4 x i32> %c) {
+define amdgpu_kernel void @test_select_v4i64(<4 x i64> addrspace(1)* %out, <4 x i32> %c) {
entry:
%cmp = icmp ne <4 x i32> %c, <i32 0, i32 0, i32 0, i32 0>
%result = select <4 x i1> %cmp, <4 x i64> <i64 0, i64 1, i64 2, i64 3>, <4 x i64> <i64 4, i64 5, i64 6, i64 7>
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