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-rw-r--r--llvm/test/CodeGen/AMDGPU/trunc.ll7
1 files changed, 4 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/trunc.ll b/llvm/test/CodeGen/AMDGPU/trunc.ll
index 63bb447df2f..0f243493d89 100644
--- a/llvm/test/CodeGen/AMDGPU/trunc.ll
+++ b/llvm/test/CodeGen/AMDGPU/trunc.ll
@@ -35,11 +35,12 @@ define void @trunc_load_shl_i64(i32 addrspace(1)* %out, i64 %a) {
; SI: s_load_dwordx2 s{{\[}}[[LO_SREG:[0-9]+]]:{{[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0xd
; SI: s_lshl_b64 s{{\[}}[[LO_SHL:[0-9]+]]:{{[0-9]+\]}}, s{{\[}}[[LO_SREG]]:{{[0-9]+\]}}, 2
; SI: s_add_u32 s[[LO_SREG2:[0-9]+]], s[[LO_SHL]],
-; SI: v_mov_b32_e32 v[[LO_VREG:[0-9]+]], s[[LO_SREG2]]
; SI: s_addc_u32
-; SI: buffer_store_dword v[[LO_VREG]],
-; SI: v_mov_b32_e32
+; SI: v_mov_b32_e32 v[[LO_VREG0:[0-9]+]], s[[LO_SREG2]]
+; SI: v_mov_b32_e32 v[[LO_VREG1:[0-9]+]], s[[LO_SREG2]]
; SI: v_mov_b32_e32
+; SI: buffer_store_dword v[[LO_VREG1]],
+; SI: buffer_store_dwordx2 v{{\[}}[[LO_VREG0]]:
define void @trunc_shl_i64(i64 addrspace(1)* %out2, i32 addrspace(1)* %out, i64 %a) {
%aa = add i64 %a, 234 ; Prevent shrinking store.
%b = shl i64 %aa, 2
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