diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/tex-clause-antidep.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/tex-clause-antidep.ll | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/tex-clause-antidep.ll b/llvm/test/CodeGen/AMDGPU/tex-clause-antidep.ll index cbb9c50974a..3a02f1ac8b3 100644 --- a/llvm/test/CodeGen/AMDGPU/tex-clause-antidep.ll +++ b/llvm/test/CodeGen/AMDGPU/tex-clause-antidep.ll @@ -12,14 +12,14 @@ define void @test(<4 x float> inreg %reg0) #0 { %6 = insertelement <4 x float> %5, float %2, i32 1 %7 = insertelement <4 x float> %6, float %3, i32 2 %8 = insertelement <4 x float> %7, float %4, i32 3 - %9 = call <4 x float> @llvm.R600.tex(<4 x float> %8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0) - %10 = call <4 x float> @llvm.R600.tex(<4 x float> %8, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0) + %9 = call <4 x float> @llvm.r600.tex(<4 x float> %8, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0) + %10 = call <4 x float> @llvm.r600.tex(<4 x float> %8, i32 1, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0) %11 = fadd <4 x float> %9, %10 call void @llvm.R600.store.swizzle(<4 x float> %11, i32 0, i32 0) ret void } -declare <4 x float> @llvm.R600.tex(<4 x float>, i32, i32, i32, i32, i32, i32, i32, i32, i32) readnone +declare <4 x float> @llvm.r600.tex(<4 x float>, i32, i32, i32, i32, i32, i32, i32, i32, i32) readnone declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32) -attributes #0 = { "ShaderType"="1" }
\ No newline at end of file +attributes #0 = { "ShaderType"="1" } |
