diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/subreg-intervals.mir')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/subreg-intervals.mir | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/subreg-intervals.mir b/llvm/test/CodeGen/AMDGPU/subreg-intervals.mir new file mode 100644 index 00000000000..c4e00215159 --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/subreg-intervals.mir @@ -0,0 +1,51 @@ +# RUN: llc -march=amdgcn -run-pass liveintervals -debug-only=regalloc -o /dev/null %s 2>&1 | FileCheck %s +# REQUIRES: asserts + +# CHECK: INTERVALS +# CHECK: vreg0 +# CHECK-LABEL: Machine code for function test0: + +# CHECK: INTERVALS +# CHECK: vreg0 +# CHECK-LABEL: Machine code for function test1: + +--- | + define void @test0() { ret void } + define void @test1() { ret void } +... +--- +name: test0 +registers: + - { id: 0, class: sreg_64 } +body: | + bb.0: + S_NOP 0, implicit-def %0 + S_NOP 0, implicit %0 + + S_NOP 0, implicit-def undef %0.sub0 + S_NOP 0, implicit %0 +... +--- +name: test1 +registers: + - { id: 0, class: sreg_64 } +body: | + bb.0: + successors: %bb.1, %bb.2 + S_CBRANCH_VCCNZ %bb.1, implicit undef %vcc + S_BRANCH %bb.2 + + bb.1: + successors: %bb.3 + S_NOP 0, implicit-def undef %0.sub0 + S_BRANCH %bb.3 + + bb.2: + successors: %bb.3 + S_NOP 0, implicit-def %0 + S_BRANCH %bb.3 + + bb.3: + S_NOP 0 + S_NOP 0, implicit %0 +... |
