diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/smrd.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/smrd.ll | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/smrd.ll b/llvm/test/CodeGen/AMDGPU/smrd.ll index 2384b741973..50f72c67059 100644 --- a/llvm/test/CodeGen/AMDGPU/smrd.ll +++ b/llvm/test/CodeGen/AMDGPU/smrd.ll @@ -6,7 +6,7 @@ ; GCN-LABEL: {{^}}smrd0: ; SICI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x1 ; encoding: [0x01 ; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x4 -define void @smrd0(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) #0 { +define amdgpu_kernel void @smrd0(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) #0 { entry: %tmp = getelementptr i32, i32 addrspace(2)* %ptr, i64 1 %tmp1 = load i32, i32 addrspace(2)* %tmp @@ -18,7 +18,7 @@ entry: ; GCN-LABEL: {{^}}smrd1: ; SICI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xff ; encoding: [0xff,0x{{[0-9]+[137]}} ; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x3fc -define void @smrd1(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) #0 { +define amdgpu_kernel void @smrd1(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) #0 { entry: %tmp = getelementptr i32, i32 addrspace(2)* %ptr, i64 255 %tmp1 = load i32, i32 addrspace(2)* %tmp @@ -33,7 +33,7 @@ entry: ; CI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x100 ; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x400 ; GCN: s_endpgm -define void @smrd2(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) #0 { +define amdgpu_kernel void @smrd2(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) #0 { entry: %tmp = getelementptr i32, i32 addrspace(2)* %ptr, i64 256 %tmp1 = load i32, i32 addrspace(2)* %tmp @@ -48,7 +48,7 @@ entry: ; SI: s_load_dwordx2 s[{{[0-9]:[0-9]}}], s[{{[0-9]:[0-9]}}], 0xb ; encoding: [0x0b ; TODO: Add VI checks ; GCN: s_endpgm -define void @smrd3(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) #0 { +define amdgpu_kernel void @smrd3(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) #0 { entry: %tmp = getelementptr i32, i32 addrspace(2)* %ptr, i64 4294967296 %tmp1 = load i32, i32 addrspace(2)* %tmp @@ -62,7 +62,7 @@ entry: ; SI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], [[OFFSET]] ; CI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x3ffff ; VI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0xffffc -define void @smrd4(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) #0 { +define amdgpu_kernel void @smrd4(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) #0 { entry: %tmp = getelementptr i32, i32 addrspace(2)* %ptr, i64 262143 %tmp1 = load i32, i32 addrspace(2)* %tmp @@ -76,7 +76,7 @@ entry: ; SIVI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], [[OFFSET]] ; CI: s_load_dword s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x40000 ; GCN: s_endpgm -define void @smrd5(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) #0 { +define amdgpu_kernel void @smrd5(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) #0 { entry: %tmp = getelementptr i32, i32 addrspace(2)* %ptr, i64 262144 %tmp1 = load i32, i32 addrspace(2)* %tmp |
