diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/si-lod-bias.ll')
-rw-r--r-- | llvm/test/CodeGen/AMDGPU/si-lod-bias.ll | 51 |
1 files changed, 25 insertions, 26 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/si-lod-bias.ll b/llvm/test/CodeGen/AMDGPU/si-lod-bias.ll index 944499a1146..a3c8a239691 100644 --- a/llvm/test/CodeGen/AMDGPU/si-lod-bias.ll +++ b/llvm/test/CodeGen/AMDGPU/si-lod-bias.ll @@ -6,31 +6,30 @@ ; CHECK: {{^}}main: ; CHECK: image_sample_b v{{\[[0-9]:[0-9]\]}}, 15, 0, 0, 0, 0, 0, 0, 0, v{{\[[0-9]:[0-9]\]}} - -define void @main(<16 x i8> addrspace(2)* inreg, <16 x i8> addrspace(2)* inreg, <32 x i8> addrspace(2)* inreg, i32 inreg, <2 x i32>, <2 x i32>, <2 x i32>, <3 x i32>, <2 x i32>, <2 x i32>, <2 x i32>, float, float, float, float, float, float, float, float, float) #0 { +define void @main(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <32 x i8> addrspace(2)* inreg %arg2, i32 inreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19) #0 { main_body: - %20 = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %0, i32 0 - %21 = load <16 x i8>, <16 x i8> addrspace(2)* %20, !tbaa !1 - %22 = call float @llvm.SI.load.const(<16 x i8> %21, i32 16) - %23 = getelementptr <32 x i8>, <32 x i8> addrspace(2)* %2, i32 0 - %24 = load <32 x i8>, <32 x i8> addrspace(2)* %23, !tbaa !1 - %25 = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %1, i32 0 - %26 = load <16 x i8>, <16 x i8> addrspace(2)* %25, !tbaa !1 - %27 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %3, <2 x i32> %5) - %28 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %3, <2 x i32> %5) - %29 = bitcast float %22 to i32 - %30 = bitcast float %27 to i32 - %31 = bitcast float %28 to i32 - %32 = insertelement <4 x i32> undef, i32 %29, i32 0 - %33 = insertelement <4 x i32> %32, i32 %30, i32 1 - %34 = insertelement <4 x i32> %33, i32 %31, i32 2 - %35 = insertelement <4 x i32> %34, i32 undef, i32 3 - %36 = call <4 x float> @llvm.SI.sampleb.v4i32(<4 x i32> %35, <32 x i8> %24, <16 x i8> %26, i32 2) - %37 = extractelement <4 x float> %36, i32 0 - %38 = extractelement <4 x float> %36, i32 1 - %39 = extractelement <4 x float> %36, i32 2 - %40 = extractelement <4 x float> %36, i32 3 - call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %37, float %38, float %39, float %40) + %tmp = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %arg, i32 0 + %tmp20 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp, !tbaa !0 + %tmp21 = call float @llvm.SI.load.const(<16 x i8> %tmp20, i32 16) + %tmp22 = getelementptr <32 x i8>, <32 x i8> addrspace(2)* %arg2, i32 0 + %tmp23 = load <32 x i8>, <32 x i8> addrspace(2)* %tmp22, !tbaa !0 + %tmp24 = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %arg1, i32 0 + %tmp25 = load <16 x i8>, <16 x i8> addrspace(2)* %tmp24, !tbaa !0 + %tmp26 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %arg3, <2 x i32> %arg5) + %tmp27 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %arg3, <2 x i32> %arg5) + %tmp28 = bitcast float %tmp21 to i32 + %tmp29 = bitcast float %tmp26 to i32 + %tmp30 = bitcast float %tmp27 to i32 + %tmp31 = insertelement <4 x i32> undef, i32 %tmp28, i32 0 + %tmp32 = insertelement <4 x i32> %tmp31, i32 %tmp29, i32 1 + %tmp33 = insertelement <4 x i32> %tmp32, i32 %tmp30, i32 2 + %tmp34 = insertelement <4 x i32> %tmp33, i32 undef, i32 3 + %tmp35 = call <4 x float> @llvm.SI.sampleb.v4i32(<4 x i32> %tmp34, <32 x i8> %tmp23, <16 x i8> %tmp25, i32 2) + %tmp36 = extractelement <4 x float> %tmp35, i32 0 + %tmp37 = extractelement <4 x float> %tmp35, i32 1 + %tmp38 = extractelement <4 x float> %tmp35, i32 2 + %tmp39 = extractelement <4 x float> %tmp35, i32 3 + call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %tmp36, float %tmp37, float %tmp38, float %tmp39) ret void } @@ -48,5 +47,5 @@ declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float attributes #0 = { "ShaderType"="0" } attributes #1 = { nounwind readnone } -!0 = !{!"const", null} -!1 = !{!0, !0, i64 0, i32 1} +!0 = !{!1, !1, i64 0, i32 1} +!1 = !{!"const", null} |