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-rw-r--r--llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll81
1 files changed, 81 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll b/llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
index 2ca3aeba0b1..133fd480e59 100644
--- a/llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
+++ b/llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
@@ -64,6 +64,87 @@ exit:
ret void
}
+; FIXME: should emit s_endpgm
+; CHECK-LABEL: {{^}}switch_unreachable:
+; CHECK-NOT: s_endpgm
+; CHECK: .Lfunc_end2
+define void @switch_unreachable(i32 addrspace(1)* %g, i8 addrspace(3)* %l, i32 %x) nounwind {
+centry:
+ switch i32 %x, label %sw.default [
+ i32 0, label %sw.bb
+ i32 60, label %sw.bb
+ ]
+
+sw.bb:
+ unreachable
+
+sw.default:
+ unreachable
+
+sw.epilog:
+ ret void
+}
+
+declare float @llvm.fabs.f32(float) nounwind readnone
+
+; This broke the old AMDIL cfg structurizer
+; FUNC-LABEL: {{^}}loop_land_info_assert:
+; SI: s_cmp_gt_i32
+; SI-NEXT: s_cbranch_scc0 [[ENDPGM:BB[0-9]+_[0-9]+]]
+
+; SI: s_cmp_gt_i32
+; SI-NEXT: s_cbranch_scc1 [[ENDPGM]]
+
+; SI: [[INFLOOP:BB[0-9]+_[0-9]+]]
+; SI: s_branch [[INFLOOP]]
+
+; SI: [[ENDPGM]]:
+; SI: s_endpgm
+define void @loop_land_info_assert(i32 %c0, i32 %c1, i32 %c2, i32 %c3, i32 %x, i32 %y, i1 %arg) nounwind {
+entry:
+ %cmp = icmp sgt i32 %c0, 0
+ br label %while.cond.outer
+
+while.cond.outer:
+ %tmp = load float, float addrspace(1)* undef
+ br label %while.cond
+
+while.cond:
+ %cmp1 = icmp slt i32 %c1, 4
+ br i1 %cmp1, label %convex.exit, label %for.cond
+
+convex.exit:
+ %or = or i1 %cmp, %cmp1
+ br i1 %or, label %return, label %if.end
+
+if.end:
+ %tmp3 = call float @llvm.fabs.f32(float %tmp) nounwind readnone
+ %cmp2 = fcmp olt float %tmp3, 0x3E80000000000000
+ br i1 %cmp2, label %if.else, label %while.cond.outer
+
+if.else:
+ store volatile i32 3, i32 addrspace(1)* undef, align 4
+ br label %while.cond
+
+for.cond:
+ %cmp3 = icmp slt i32 %c3, 1000
+ br i1 %cmp3, label %for.body, label %return
+
+for.body:
+ br i1 %cmp3, label %self.loop, label %if.end.2
+
+if.end.2:
+ %or.cond2 = or i1 %cmp3, %arg
+ br i1 %or.cond2, label %return, label %for.cond
+
+self.loop:
+ br label %self.loop
+
+return:
+ ret void
+}
+
+
declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32) #0
attributes #0 = { nounwind readnone }
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