diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/setcc-opt.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/setcc-opt.ll | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/setcc-opt.ll b/llvm/test/CodeGen/AMDGPU/setcc-opt.ll index 0b17a6da3c6..405640cf88e 100644 --- a/llvm/test/CodeGen/AMDGPU/setcc-opt.ll +++ b/llvm/test/CodeGen/AMDGPU/setcc-opt.ll @@ -199,10 +199,10 @@ define void @sext_bool_icmp_ne_k(i1 addrspace(1)* %out, i32 %a, i32 %b) nounwind ; SI: s_load_dword [[VALUE:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0xb ; VI: s_load_dword [[VALUE:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c ; GCN: s_movk_i32 [[K255:s[0-9]+]], 0xff -; GCN: s_and_b32 [[B:s[0-9]+]], [[VALUE]], [[K255]] -; GCN: v_mov_b32_e32 [[VK255:v[0-9]+]], [[K255]] +; GCN-DAG: s_and_b32 [[B:s[0-9]+]], [[VALUE]], [[K255]] +; GCN-DAG: v_mov_b32_e32 [[VK255:v[0-9]+]], [[K255]] ; GCN: v_cmp_ne_i32_e32 vcc, [[B]], [[VK255]] -; GCN-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, vcc +; GCN: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, vcc ; GCN: buffer_store_byte [[RESULT]] ; GCN: s_endpgm define void @cmp_zext_k_i8max(i1 addrspace(1)* %out, i8 %b) nounwind { @@ -247,10 +247,10 @@ define void @cmp_sext_k_neg1_i8_sext_arg(i1 addrspace(1)* %out, i8 signext %b) n ; SI: s_load_dword [[VAL:s[0-9]+]], s[{{[0-9]+:[0-9]+}}], 0xb ; VI: s_load_dword [[VAL:s[0-9]+]], s{{\[[0-9]+:[0-9]+\]}}, 0x2c ; GCN: s_movk_i32 [[K:s[0-9]+]], 0xff -; GCN: s_and_b32 [[B:s[0-9]+]], [[VAL]], [[K]] -; GCN: v_mov_b32_e32 [[VK:v[0-9]+]], [[K]] +; GCN-DAG: s_and_b32 [[B:s[0-9]+]], [[VAL]], [[K]] +; GCN-DAG: v_mov_b32_e32 [[VK:v[0-9]+]], [[K]] ; GCN: v_cmp_ne_i32_e32 vcc, [[B]], [[VK]]{{$}} -; GCN-NEXT: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, vcc +; GCN: v_cndmask_b32_e64 [[RESULT:v[0-9]+]], 0, 1, vcc ; GCN: buffer_store_byte [[RESULT]] ; GCN: s_endpgm define void @cmp_sext_k_neg1_i8_arg(i1 addrspace(1)* %out, i8 %b) nounwind { |
