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-rw-r--r--llvm/test/CodeGen/AMDGPU/input-mods.ll4
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/input-mods.ll b/llvm/test/CodeGen/AMDGPU/input-mods.ll
index 1c4d285cbcb..c098d23e55a 100644
--- a/llvm/test/CodeGen/AMDGPU/input-mods.ll
+++ b/llvm/test/CodeGen/AMDGPU/input-mods.ll
@@ -9,7 +9,7 @@
;CM: EXP_IEEE T{{[0-9]+}}.Z (MASKED), -|T{{[0-9]+}}.X|
;CM: EXP_IEEE * T{{[0-9]+}}.W (MASKED), -|T{{[0-9]+}}.X|
-define void @test(<4 x float> inreg %reg0) #0 {
+define amdgpu_ps void @test(<4 x float> inreg %reg0) {
%r0 = extractelement <4 x float> %reg0, i32 0
%r1 = call float @llvm.fabs.f32(float %r0)
%r2 = fsub float -0.000000e+00, %r1
@@ -22,5 +22,3 @@ define void @test(<4 x float> inreg %reg0) #0 {
declare float @llvm.exp2.f32(float) readnone
declare float @llvm.fabs.f32(float) readnone
declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
-
-attributes #0 = { "ShaderType"="0" }
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