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-rw-r--r--llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll36
1 files changed, 36 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll b/llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
new file mode 100644
index 00000000000..e2ae3353ae1
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/flat-scratch-reg.ll
@@ -0,0 +1,36 @@
+; RUN: llc < %s -march=amdgcn -mcpu=kaveri -verify-machineinstrs | FileCheck %s --check-prefix=GCN --check-prefix=CI
+; RUN: llc < %s -march=amdgcn -mcpu=fiji -verify-machineinstrs | FileCheck %s --check-prefix=GCN --check-prefix=VI
+
+; GCN-LABEL: {{^}}no_vcc_no_flat:
+; GCN: ; NumSgprs: 8
+define void @no_vcc_no_flat() {
+entry:
+ call void asm sideeffect "", "~{SGPR7}"()
+ ret void
+}
+
+; GCN-LABEL: {{^}}vcc_no_flat:
+; GCN: ; NumSgprs: 10
+define void @vcc_no_flat() {
+entry:
+ call void asm sideeffect "", "~{SGPR7},~{VCC}"()
+ ret void
+}
+
+; GCN-LABEL: {{^}}no_vcc_flat:
+; CI: ; NumSgprs: 12
+; VI: ; NumSgprs: 14
+define void @no_vcc_flat() {
+entry:
+ call void asm sideeffect "", "~{SGPR7},~{FLAT_SCR}"()
+ ret void
+}
+
+; GCN-LABEL: {{^}}vcc_flat:
+; CI: ; NumSgprs: 12
+; VI: ; NumSgprs: 14
+define void @vcc_flat() {
+entry:
+ call void asm sideeffect "", "~{SGPR7},~{VCC},~{FLAT_SCR}"()
+ ret void
+}
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