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-rw-r--r--llvm/test/CodeGen/AMDGPU/fetch-limits.r600.ll4
1 files changed, 1 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/fetch-limits.r600.ll b/llvm/test/CodeGen/AMDGPU/fetch-limits.r600.ll
index e7160ef5d72..6f86422f111 100644
--- a/llvm/test/CodeGen/AMDGPU/fetch-limits.r600.ll
+++ b/llvm/test/CodeGen/AMDGPU/fetch-limits.r600.ll
@@ -7,7 +7,7 @@
; CHECK: Fetch clause
; CHECK: Fetch clause
-define void @fetch_limits_r600() #0 {
+define amdgpu_ps void @fetch_limits_r600() {
entry:
%0 = load <4 x float>, <4 x float> addrspace(8)* null
%1 = load <4 x float>, <4 x float> addrspace(8)* getelementptr ([1024 x <4 x float>], [1024 x <4 x float>] addrspace(8)* null, i64 0, i32 1)
@@ -42,7 +42,5 @@ entry:
ret void
}
-attributes #0 = { "ShaderType"="0" } ; Pixel Shader
-
declare <4 x float> @llvm.AMDGPU.tex(<4 x float>, i32, i32, i32) readnone
declare void @llvm.R600.store.swizzle(<4 x float>, i32, i32)
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