diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/fdiv.f16.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/fdiv.f16.ll | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/fdiv.f16.ll b/llvm/test/CodeGen/AMDGPU/fdiv.f16.ll index 70b70bdaaaa..4dc99042f80 100644 --- a/llvm/test/CodeGen/AMDGPU/fdiv.f16.ll +++ b/llvm/test/CodeGen/AMDGPU/fdiv.f16.ll @@ -204,6 +204,42 @@ entry: ret void } +; FUNC-LABEL: {{^}}div_arcp_2_x_pat_f16: +; SI: v_mul_f32_e32 v{{[0-9]+}}, 0.5, v{{[0-9]+}} + +; VI: v_mul_f16_e32 [[MUL:v[0-9]+]], 0.5, v{{[0-9]+}} +; VI: buffer_store_short [[MUL]] +define void @div_arcp_2_x_pat_f16(half addrspace(1)* %out) #0 { + %x = load half, half addrspace(1)* undef + %rcp = fdiv arcp half %x, 2.0 + store half %rcp, half addrspace(1)* %out, align 4 + ret void +} + +; FUNC-LABEL: {{^}}div_arcp_k_x_pat_f16: +; SI: v_mul_f32_e32 v{{[0-9]+}}, 0x3dcccccd, v{{[0-9]+}} + +; VI: v_mul_f16_e32 [[MUL:v[0-9]+]], 0x2e66, v{{[0-9]+}} +; VI: buffer_store_short [[MUL]] +define void @div_arcp_k_x_pat_f16(half addrspace(1)* %out) #0 { + %x = load half, half addrspace(1)* undef + %rcp = fdiv arcp half %x, 10.0 + store half %rcp, half addrspace(1)* %out, align 4 + ret void +} + +; FUNC-LABEL: {{^}}div_arcp_neg_k_x_pat_f16: +; SI: v_mul_f32_e32 v{{[0-9]+}}, 0xbdcccccd, v{{[0-9]+}} + +; VI: v_mul_f16_e32 [[MUL:v[0-9]+]], 0xae66, v{{[0-9]+}} +; VI: buffer_store_short [[MUL]] +define void @div_arcp_neg_k_x_pat_f16(half addrspace(1)* %out) #0 { + %x = load half, half addrspace(1)* undef + %rcp = fdiv arcp half %x, -10.0 + store half %rcp, half addrspace(1)* %out, align 4 + ret void +} + declare i32 @llvm.amdgcn.workitem.id.x() #1 declare half @llvm.sqrt.f16(half) #1 declare half @llvm.fabs.f16(half) #1 |
