diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll')
-rw-r--r-- | llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll b/llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll index a92f691e399..53adf09026e 100644 --- a/llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll +++ b/llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll @@ -36,7 +36,7 @@ ; GCN: BB0_3: ; GCN: buffer_store_dword ; GCN: s_endpgm -define void @sink_ubfe_i32(i32 addrspace(1)* %out, i32 %arg1) #0 { +define amdgpu_kernel void @sink_ubfe_i32(i32 addrspace(1)* %out, i32 %arg1) #0 { entry: %shr = lshr i32 %arg1, 8 br i1 undef, label %bb0, label %bb1 @@ -76,7 +76,7 @@ ret: ; OPT: ret ; GCN-LABEL: {{^}}sink_sbfe_i32: -define void @sink_sbfe_i32(i32 addrspace(1)* %out, i32 %arg1) #0 { +define amdgpu_kernel void @sink_sbfe_i32(i32 addrspace(1)* %out, i32 %arg1) #0 { entry: %shr = ashr i32 %arg1, 8 br i1 undef, label %bb0, label %bb1 @@ -134,7 +134,7 @@ ret: ; GCN: BB2_3: ; GCN: buffer_store_short ; GCN: s_endpgm -define void @sink_ubfe_i16(i16 addrspace(1)* %out, i16 %arg1) #0 { +define amdgpu_kernel void @sink_ubfe_i16(i16 addrspace(1)* %out, i16 %arg1) #0 { entry: %shr = lshr i16 %arg1, 4 br i1 undef, label %bb0, label %bb1 @@ -187,7 +187,7 @@ ret: ; GCN: BB3_3: ; GCN: buffer_store_dwordx2 -define void @sink_ubfe_i64_span_midpoint(i64 addrspace(1)* %out, i64 %arg1) #0 { +define amdgpu_kernel void @sink_ubfe_i64_span_midpoint(i64 addrspace(1)* %out, i64 %arg1) #0 { entry: %shr = lshr i64 %arg1, 30 br i1 undef, label %bb0, label %bb1 @@ -236,7 +236,7 @@ ret: ; GCN: BB4_3: ; GCN: buffer_store_dwordx2 -define void @sink_ubfe_i64_low32(i64 addrspace(1)* %out, i64 %arg1) #0 { +define amdgpu_kernel void @sink_ubfe_i64_low32(i64 addrspace(1)* %out, i64 %arg1) #0 { entry: %shr = lshr i64 %arg1, 15 br i1 undef, label %bb0, label %bb1 @@ -283,7 +283,7 @@ ret: ; GCN: BB5_3: ; GCN: buffer_store_dwordx2 -define void @sink_ubfe_i64_high32(i64 addrspace(1)* %out, i64 %arg1) #0 { +define amdgpu_kernel void @sink_ubfe_i64_high32(i64 addrspace(1)* %out, i64 %arg1) #0 { entry: %shr = lshr i64 %arg1, 35 br i1 undef, label %bb0, label %bb1 |