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-rw-r--r--llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir247
1 files changed, 247 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir
new file mode 100644
index 00000000000..e1dd3293f4c
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir
@@ -0,0 +1,247 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -march=amdgcn -mcpu=tahiti -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
+# XUN: llc -march=amdgcn -mcpu=fiji -run-pass=instruction-select -global-isel-abort=0 -verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
+# XUN: llc -march=amdgcn -mcpu=gfx900 -run-pass=instruction-select -global-isel-abort=0-verify-machineinstrs -o - %s | FileCheck -check-prefix=GCN %s
+
+---
+name: fabs_s32_ss
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0
+ ; GCN-LABEL: name: fabs_s32_ss
+ ; GCN: liveins: $sgpr0
+ ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
+ ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483647
+ ; GCN: [[S_AND_B32_:%[0-9]+]]:sreg_32_xm0 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
+ ; GCN: $sgpr0 = COPY [[S_AND_B32_]]
+ %0:sgpr(s32) = COPY $sgpr0
+ %1:sgpr(s32) = G_FABS %0
+ $sgpr0 = COPY %1
+...
+
+---
+name: fabs_s32_vv
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0
+ ; GCN-LABEL: name: fabs_s32_vv
+ ; GCN: liveins: $vgpr0
+ ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483647
+ ; GCN: [[V_AND_B32_e32_:%[0-9]+]]:vgpr_32 = V_AND_B32_e32 [[S_MOV_B32_]], [[COPY]], implicit $exec
+ ; GCN: $vgpr0 = COPY [[V_AND_B32_e32_]]
+ %0:vgpr(s32) = COPY $vgpr0
+ %1:vgpr(s32) = G_FABS %0
+ $vgpr0 = COPY %1
+...
+
+---
+name: fabs_s32_vs
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0
+ ; GCN-LABEL: name: fabs_s32_vs
+ ; GCN: liveins: $sgpr0
+ ; GCN: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
+ ; GCN: [[FABS:%[0-9]+]]:vgpr_32(s32) = G_FABS [[COPY]]
+ ; GCN: $vgpr0 = COPY [[FABS]](s32)
+ %0:sgpr(s32) = COPY $sgpr0
+ %1:vgpr(s32) = G_FABS %0
+ $vgpr0 = COPY %1
+...
+
+---
+name: fabs_v2s16_ss
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0_sgpr1
+ ; GCN-LABEL: name: fabs_v2s16_ss
+ ; GCN: liveins: $sgpr0_sgpr1
+ ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
+ ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147450879
+ ; GCN: [[S_AND_B32_:%[0-9]+]]:sreg_32_xm0 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
+ ; GCN: $sgpr0 = COPY [[S_AND_B32_]]
+ %0:sgpr(<2 x s16>) = COPY $sgpr0
+ %1:sgpr(<2 x s16>) = G_FABS %0
+ $sgpr0 = COPY %1
+...
+
+---
+name: fabs_s16_ss
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0
+ ; GCN-LABEL: name: fabs_s16_ss
+ ; GCN: liveins: $sgpr0
+ ; GCN: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
+ ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32767
+ ; GCN: [[S_AND_B32_:%[0-9]+]]:sreg_32_xm0 = S_AND_B32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
+ ; GCN: $sgpr0 = COPY [[S_AND_B32_]]
+ %0:sgpr(s32) = COPY $sgpr0
+ %1:sgpr(s16) = G_TRUNC %0
+ %2:sgpr(s16) = G_FABS %1
+ %3:sgpr(s32) = G_ANYEXT %2
+ $sgpr0 = COPY %3
+...
+
+---
+name: fabs_s16_vv
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0
+ ; GCN-LABEL: name: fabs_s16_vv
+ ; GCN: liveins: $vgpr0
+ ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 32767
+ ; GCN: [[V_AND_B32_e32_:%[0-9]+]]:vgpr_32 = V_AND_B32_e32 [[S_MOV_B32_]], [[COPY]], implicit $exec
+ ; GCN: $vgpr0 = COPY [[V_AND_B32_e32_]]
+ %0:vgpr(s32) = COPY $vgpr0
+ %1:vgpr(s16) = G_TRUNC %0
+ %2:vgpr(s16) = G_FABS %1
+ %3:vgpr(s32) = G_ANYEXT %2
+ $vgpr0 = COPY %3
+...
+
+---
+name: fabs_s16_vs
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0
+
+ ; GCN-LABEL: name: fabs_s16_vs
+ ; GCN: liveins: $sgpr0
+ ; GCN: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
+ ; GCN: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
+ ; GCN: [[FABS:%[0-9]+]]:vgpr_32(s16) = G_FABS [[TRUNC]]
+ ; GCN: [[COPY1:%[0-9]+]]:vgpr_32(s32) = COPY [[FABS]](s16)
+ ; GCN: $vgpr0 = COPY [[COPY1]](s32)
+ %0:sgpr(s32) = COPY $sgpr0
+ %1:sgpr(s16) = G_TRUNC %0
+ %2:vgpr(s16) = G_FABS %1
+ %3:vgpr(s32) = G_ANYEXT %2
+ $vgpr0 = COPY %3
+...
+
+---
+name: fabs_v2s16_vv
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0
+ ; GCN-LABEL: name: fabs_v2s16_vv
+ ; GCN: liveins: $vgpr0
+ ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; GCN: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147450879
+ ; GCN: [[V_AND_B32_e32_:%[0-9]+]]:vgpr_32 = V_AND_B32_e32 [[S_MOV_B32_]], [[COPY]], implicit $exec
+ ; GCN: $vgpr0 = COPY [[V_AND_B32_e32_]]
+ %0:vgpr(<2 x s16>) = COPY $vgpr0
+ %1:vgpr(<2 x s16>) = G_FABS %0
+ $vgpr0 = COPY %1
+...
+
+---
+name: fabs_v2s16_vs
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0
+ ; GCN-LABEL: name: fabs_v2s16_vs
+ ; GCN: liveins: $sgpr0
+ ; GCN: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
+ ; GCN: [[FABS:%[0-9]+]]:vgpr_32(<2 x s16>) = G_FABS [[COPY]]
+ ; GCN: $vgpr0 = COPY [[FABS]](<2 x s16>)
+ %0:sgpr(<2 x s16>) = COPY $sgpr0
+ %1:vgpr(<2 x s16>) = G_FABS %0
+ $vgpr0 = COPY %1
+...
+
+---
+name: fabs_s64_ss
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0_sgpr1
+ ; GCN-LABEL: name: fabs_s64_ss
+ ; GCN: liveins: $sgpr0_sgpr1
+ ; GCN: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
+ ; GCN: [[FABS:%[0-9]+]]:sreg_64_xexec(s64) = G_FABS [[COPY]]
+ ; GCN: $sgpr0_sgpr1 = COPY [[FABS]](s64)
+ %0:sgpr(s64) = COPY $sgpr0_sgpr1
+ %1:sgpr(s64) = G_FABS %0
+ $sgpr0_sgpr1 = COPY %1
+...
+
+---
+name: fabs_s64_vv
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0_vgpr1
+ ; GCN-LABEL: name: fabs_s64_vv
+ ; GCN: liveins: $vgpr0_vgpr1
+ ; GCN: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
+ ; GCN: [[FABS:%[0-9]+]]:vreg_64(s64) = G_FABS [[COPY]]
+ ; GCN: $vgpr0_vgpr1 = COPY [[FABS]](s64)
+ %0:vgpr(s64) = COPY $vgpr0_vgpr1
+ %1:vgpr(s64) = G_FABS %0
+ $vgpr0_vgpr1 = COPY %1
+...
+
+---
+name: fabs_s64_vs
+legalized: true
+regBankSelected: true
+tracksRegLiveness: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0_sgpr1
+ ; GCN-LABEL: name: fabs_s64_vs
+ ; GCN: liveins: $sgpr0_sgpr1
+ ; GCN: [[COPY:%[0-9]+]]:sgpr(s64) = COPY $sgpr0_sgpr1
+ ; GCN: [[FABS:%[0-9]+]]:vreg_64(s64) = G_FABS [[COPY]]
+ ; GCN: $vgpr0_vgpr1 = COPY [[FABS]](s64)
+ %0:sgpr(s64) = COPY $sgpr0_sgpr1
+ %1:vgpr(s64) = G_FABS %0
+ $vgpr0_vgpr1 = COPY %1
+...
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