diff options
Diffstat (limited to 'llvm/test/CodeGen/AArch64/unfold-masked-merge-vector-variablemask-const.ll')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/unfold-masked-merge-vector-variablemask-const.ll | 33 |
1 files changed, 14 insertions, 19 deletions
diff --git a/llvm/test/CodeGen/AArch64/unfold-masked-merge-vector-variablemask-const.ll b/llvm/test/CodeGen/AArch64/unfold-masked-merge-vector-variablemask-const.ll index 0646e62433b..ee150f1e5bd 100644 --- a/llvm/test/CodeGen/AArch64/unfold-masked-merge-vector-variablemask-const.ll +++ b/llvm/test/CodeGen/AArch64/unfold-masked-merge-vector-variablemask-const.ll @@ -77,9 +77,8 @@ define <4 x i32> @in_constant_varx_42(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mas ; CHECK-LABEL: in_constant_varx_42: ; CHECK: // %bb.0: ; CHECK-NEXT: movi v1.4s, #42 -; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b -; CHECK-NEXT: and v0.16b, v0.16b, v2.16b -; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b +; CHECK-NEXT: bsl v2.16b, v0.16b, v1.16b +; CHECK-NEXT: mov v0.16b, v2.16b ; CHECK-NEXT: ret %n0 = xor <4 x i32> %x, <i32 42, i32 42, i32 42, i32 42> ; %x %n1 = and <4 x i32> %n0, %mask @@ -107,9 +106,8 @@ define <4 x i32> @in_constant_varx_42_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i ; CHECK-LABEL: in_constant_varx_42_invmask: ; CHECK: // %bb.0: ; CHECK-NEXT: movi v1.4s, #42 -; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b -; CHECK-NEXT: bic v0.16b, v0.16b, v2.16b -; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b +; CHECK-NEXT: bsl v2.16b, v1.16b, v0.16b +; CHECK-NEXT: mov v0.16b, v2.16b ; CHECK-NEXT: ret %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1> %n0 = xor <4 x i32> %x, <i32 42, i32 42, i32 42, i32 42> ; %x @@ -134,8 +132,8 @@ define <4 x i32> @out_constant_mone_vary(<4 x i32> %x, <4 x i32> %y, <4 x i32> % define <4 x i32> @in_constant_mone_vary(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { ; CHECK-LABEL: in_constant_mone_vary: ; CHECK: // %bb.0: -; CHECK-NEXT: bic v0.16b, v2.16b, v1.16b -; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b +; CHECK-NEXT: bic v0.16b, v1.16b, v2.16b +; CHECK-NEXT: orr v0.16b, v2.16b, v0.16b ; CHECK-NEXT: ret %n0 = xor <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %y ; %x %n1 = and <4 x i32> %n0, %mask @@ -161,9 +159,8 @@ define <4 x i32> @out_constant_mone_vary_invmask(<4 x i32> %x, <4 x i32> %y, <4 define <4 x i32> @in_constant_mone_vary_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { ; CHECK-LABEL: in_constant_mone_vary_invmask: ; CHECK: // %bb.0: -; CHECK-NEXT: mvn v0.16b, v1.16b -; CHECK-NEXT: bic v0.16b, v0.16b, v2.16b -; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b +; CHECK-NEXT: and v0.16b, v1.16b, v2.16b +; CHECK-NEXT: orn v0.16b, v0.16b, v2.16b ; CHECK-NEXT: ret %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1> %n0 = xor <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %y ; %x @@ -189,10 +186,9 @@ define <4 x i32> @out_constant_42_vary(<4 x i32> %x, <4 x i32> %y, <4 x i32> %ma define <4 x i32> @in_constant_42_vary(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { ; CHECK-LABEL: in_constant_42_vary: ; CHECK: // %bb.0: -; CHECK-NEXT: movi v0.4s, #42 -; CHECK-NEXT: eor v0.16b, v1.16b, v0.16b -; CHECK-NEXT: and v0.16b, v0.16b, v2.16b -; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: movi v2.4s, #42 +; CHECK-NEXT: bsl v0.16b, v2.16b, v1.16b ; CHECK-NEXT: ret %n0 = xor <4 x i32> <i32 42, i32 42, i32 42, i32 42>, %y ; %x %n1 = and <4 x i32> %n0, %mask @@ -219,10 +215,9 @@ define <4 x i32> @out_constant_42_vary_invmask(<4 x i32> %x, <4 x i32> %y, <4 x define <4 x i32> @in_constant_42_vary_invmask(<4 x i32> %x, <4 x i32> %y, <4 x i32> %mask) { ; CHECK-LABEL: in_constant_42_vary_invmask: ; CHECK: // %bb.0: -; CHECK-NEXT: movi v0.4s, #42 -; CHECK-NEXT: eor v0.16b, v1.16b, v0.16b -; CHECK-NEXT: bic v0.16b, v0.16b, v2.16b -; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b +; CHECK-NEXT: mov v0.16b, v2.16b +; CHECK-NEXT: movi v2.4s, #42 +; CHECK-NEXT: bsl v0.16b, v1.16b, v2.16b ; CHECK-NEXT: ret %notmask = xor <4 x i32> %mask, <i32 -1, i32 -1, i32 -1, i32 -1> %n0 = xor <4 x i32> <i32 42, i32 42, i32 42, i32 42>, %y ; %x |

