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-rw-r--r--llvm/test/CodeGen/AArch64/machine-outliner.ll71
1 files changed, 44 insertions, 27 deletions
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner.ll b/llvm/test/CodeGen/AArch64/machine-outliner.ll
index 7e0dc8c6d6f..1b45409b799 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner.ll
@@ -6,15 +6,18 @@ define linkonce_odr void @fish() #0 {
; CHECK-LABEL: _fish:
; CHECK-NOT: OUTLINED
; ODR: [[OUTLINED:OUTLINED_FUNCTION_[0-9]+]]
- ; ODR-NOT: ret
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
%4 = alloca i32, align 4
- store i32 0, i32* %1, align 4
- store i32 1, i32* %2, align 4
- store i32 2, i32* %3, align 4
- store i32 3, i32* %4, align 4
+ %5 = alloca i32, align 4
+ %6 = alloca i32, align 4
+ store i32 1, i32* %1, align 4
+ store i32 2, i32* %2, align 4
+ store i32 3, i32* %3, align 4
+ store i32 4, i32* %4, align 4
+ store i32 5, i32* %5, align 4
+ store i32 6, i32* %6, align 4
ret void
}
@@ -26,10 +29,14 @@ define void @turtle() section "TURTLE,turtle" {
%2 = alloca i32, align 4
%3 = alloca i32, align 4
%4 = alloca i32, align 4
- store i32 0, i32* %1, align 4
- store i32 1, i32* %2, align 4
- store i32 2, i32* %3, align 4
- store i32 3, i32* %4, align 4
+ %5 = alloca i32, align 4
+ %6 = alloca i32, align 4
+ store i32 1, i32* %1, align 4
+ store i32 2, i32* %2, align 4
+ store i32 3, i32* %3, align 4
+ store i32 4, i32* %4, align 4
+ store i32 5, i32* %5, align 4
+ store i32 6, i32* %6, align 4
ret void
}
@@ -37,16 +44,18 @@ define void @cat() #0 {
; CHECK-LABEL: _cat:
; CHECK: [[OUTLINED:OUTLINED_FUNCTION_[0-9]+]]
; ODR: [[OUTLINED]]
- ; CHECK-NOT: ret
- ; ODR-NOT: ret
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
%4 = alloca i32, align 4
- store i32 0, i32* %1, align 4
- store i32 1, i32* %2, align 4
- store i32 2, i32* %3, align 4
- store i32 3, i32* %4, align 4
+ %5 = alloca i32, align 4
+ %6 = alloca i32, align 4
+ store i32 1, i32* %1, align 4
+ store i32 2, i32* %2, align 4
+ store i32 3, i32* %3, align 4
+ store i32 4, i32* %4, align 4
+ store i32 5, i32* %5, align 4
+ store i32 6, i32* %6, align 4
ret void
}
@@ -54,28 +63,36 @@ define void @dog() #0 {
; CHECK-LABEL: _dog:
; CHECK: [[OUTLINED]]
; ODR: [[OUTLINED]]
- ; CHECK-NOT: ret
- ; ODR-NOT: ret
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
%4 = alloca i32, align 4
- store i32 0, i32* %1, align 4
- store i32 1, i32* %2, align 4
- store i32 2, i32* %3, align 4
- store i32 3, i32* %4, align 4
+ %5 = alloca i32, align 4
+ %6 = alloca i32, align 4
+ store i32 1, i32* %1, align 4
+ store i32 2, i32* %2, align 4
+ store i32 3, i32* %3, align 4
+ store i32 4, i32* %4, align 4
+ store i32 5, i32* %5, align 4
+ store i32 6, i32* %6, align 4
ret void
}
; ODR: [[OUTLINED]]:
; CHECK: .p2align 2
; CHECK-NEXT: [[OUTLINED]]:
-; CHECK-DAG: orr w8, wzr, #0x1
-; CHECK-NEXT: stp w8, wzr, [sp, #8]
-; CHECK-NEXT: orr w8, wzr, #0x2
-; CHECK-NEXT: str w8, [sp, #4]
-; CHECK-NEXT: orr w8, wzr, #0x3
-; CHECK-NEXT: str w8, [sp], #16
+; CHECK: orr w8, wzr, #0x1
+; CHECK-NEXT: str w8, [sp, #44]
+; CHECK-NEXT: orr w8, wzr, #0x2
+; CHECK-NEXT: str w8, [sp, #40]
+; CHECK-NEXT: orr w8, wzr, #0x3
+; CHECK-NEXT: str w8, [sp, #36]
+; CHECK-NEXT: orr w8, wzr, #0x4
+; CHECK-NEXT: str w8, [sp, #32]
+; CHECK-NEXT: mov w8, #5
+; CHECK-NEXT: str w8, [sp, #28]
+; CHECK-NEXT: orr w8, wzr, #0x6
+; CHECK-NEXT: str w8, [sp, #24]
; CHECK-NEXT: ret
attributes #0 = { noredzone "target-cpu"="cyclone" }
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