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-rw-r--r--llvm/test/CodeGen/AArch64/inlineasm-X-allocation.ll17
1 files changed, 17 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/inlineasm-X-allocation.ll b/llvm/test/CodeGen/AArch64/inlineasm-X-allocation.ll
new file mode 100644
index 00000000000..1d7a24e3e6e
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/inlineasm-X-allocation.ll
@@ -0,0 +1,17 @@
+; RUN: llc -mtriple=aarch64-none-eabi -mattr=-fp-armv8 %s -o - | FileCheck %s -check-prefix=nofp
+
+; In the novfp case, the compiler is forced to assign a core register,
+; even if the input is a float.
+
+; nofp-LABEL: f1
+; nofp-CHECK: ldr x0, [sp]
+
+; This can be generated by a function such as:
+; void f1(float f) {asm volatile ("ldr $0, [sp]" : : "X" (f));}
+
+define void @f1(float %f) {
+entry:
+ call void asm sideeffect "ldr $0, [sp]", "X" (float %f) nounwind
+
+ ret void
+}
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