diff options
Diffstat (limited to 'llvm/test/Analysis')
| -rw-r--r-- | llvm/test/Analysis/CostModel/X86/arith-fp.ll | 324 | ||||
| -rw-r--r-- | llvm/test/Analysis/CostModel/X86/intrinsic-cost.ll | 4 | ||||
| -rw-r--r-- | llvm/test/Analysis/CostModel/X86/reduction.ll | 8 |
3 files changed, 168 insertions, 168 deletions
diff --git a/llvm/test/Analysis/CostModel/X86/arith-fp.ll b/llvm/test/Analysis/CostModel/X86/arith-fp.ll index e5043010c11..7e7057f372e 100644 --- a/llvm/test/Analysis/CostModel/X86/arith-fp.ll +++ b/llvm/test/Analysis/CostModel/X86/arith-fp.ll @@ -10,54 +10,54 @@ target triple = "x86_64-apple-macosx10.8.0" ; CHECK-LABEL: 'fadd' define i32 @fadd(i32 %arg) { - ; SSE2: cost of 2 {{.*}} %F32 = fadd - ; SSE42: cost of 2 {{.*}} %F32 = fadd - ; AVX: cost of 2 {{.*}} %F32 = fadd - ; AVX2: cost of 2 {{.*}} %F32 = fadd - ; AVX512: cost of 2 {{.*}} %F32 = fadd + ; SSE2: cost of 1 {{.*}} %F32 = fadd + ; SSE42: cost of 1 {{.*}} %F32 = fadd + ; AVX: cost of 1 {{.*}} %F32 = fadd + ; AVX2: cost of 1 {{.*}} %F32 = fadd + ; AVX512: cost of 1 {{.*}} %F32 = fadd %F32 = fadd float undef, undef - ; SSE2: cost of 2 {{.*}} %V4F32 = fadd - ; SSE42: cost of 2 {{.*}} %V4F32 = fadd - ; AVX: cost of 2 {{.*}} %V4F32 = fadd - ; AVX2: cost of 2 {{.*}} %V4F32 = fadd - ; AVX512: cost of 2 {{.*}} %V4F32 = fadd + ; SSE2: cost of 1 {{.*}} %V4F32 = fadd + ; SSE42: cost of 1 {{.*}} %V4F32 = fadd + ; AVX: cost of 1 {{.*}} %V4F32 = fadd + ; AVX2: cost of 1 {{.*}} %V4F32 = fadd + ; AVX512: cost of 1 {{.*}} %V4F32 = fadd %V4F32 = fadd <4 x float> undef, undef - ; SSE2: cost of 4 {{.*}} %V8F32 = fadd - ; SSE42: cost of 4 {{.*}} %V8F32 = fadd - ; AVX: cost of 2 {{.*}} %V8F32 = fadd - ; AVX2: cost of 2 {{.*}} %V8F32 = fadd - ; AVX512: cost of 2 {{.*}} %V8F32 = fadd + ; SSE2: cost of 2 {{.*}} %V8F32 = fadd + ; SSE42: cost of 2 {{.*}} %V8F32 = fadd + ; AVX: cost of 1 {{.*}} %V8F32 = fadd + ; AVX2: cost of 1 {{.*}} %V8F32 = fadd + ; AVX512: cost of 1 {{.*}} %V8F32 = fadd %V8F32 = fadd <8 x float> undef, undef - ; SSE2: cost of 8 {{.*}} %V16F32 = fadd - ; SSE42: cost of 8 {{.*}} %V16F32 = fadd - ; AVX: cost of 4 {{.*}} %V16F32 = fadd - ; AVX2: cost of 4 {{.*}} %V16F32 = fadd - ; AVX512: cost of 2 {{.*}} %V16F32 = fadd + ; SSE2: cost of 4 {{.*}} %V16F32 = fadd + ; SSE42: cost of 4 {{.*}} %V16F32 = fadd + ; AVX: cost of 2 {{.*}} %V16F32 = fadd + ; AVX2: cost of 2 {{.*}} %V16F32 = fadd + ; AVX512: cost of 1 {{.*}} %V16F32 = fadd %V16F32 = fadd <16 x float> undef, undef - ; SSE2: cost of 2 {{.*}} %F64 = fadd - ; SSE42: cost of 2 {{.*}} %F64 = fadd - ; AVX: cost of 2 {{.*}} %F64 = fadd - ; AVX2: cost of 2 {{.*}} %F64 = fadd - ; AVX512: cost of 2 {{.*}} %F64 = fadd + ; SSE2: cost of 1 {{.*}} %F64 = fadd + ; SSE42: cost of 1 {{.*}} %F64 = fadd + ; AVX: cost of 1 {{.*}} %F64 = fadd + ; AVX2: cost of 1 {{.*}} %F64 = fadd + ; AVX512: cost of 1 {{.*}} %F64 = fadd %F64 = fadd double undef, undef - ; SSE2: cost of 2 {{.*}} %V2F64 = fadd - ; SSE42: cost of 2 {{.*}} %V2F64 = fadd - ; AVX: cost of 2 {{.*}} %V2F64 = fadd - ; AVX2: cost of 2 {{.*}} %V2F64 = fadd - ; AVX512: cost of 2 {{.*}} %V2F64 = fadd + ; SSE2: cost of 1 {{.*}} %V2F64 = fadd + ; SSE42: cost of 1 {{.*}} %V2F64 = fadd + ; AVX: cost of 1 {{.*}} %V2F64 = fadd + ; AVX2: cost of 1 {{.*}} %V2F64 = fadd + ; AVX512: cost of 1 {{.*}} %V2F64 = fadd %V2F64 = fadd <2 x double> undef, undef - ; SSE2: cost of 4 {{.*}} %V4F64 = fadd - ; SSE42: cost of 4 {{.*}} %V4F64 = fadd - ; AVX: cost of 2 {{.*}} %V4F64 = fadd - ; AVX2: cost of 2 {{.*}} %V4F64 = fadd - ; AVX512: cost of 2 {{.*}} %V4F64 = fadd + ; SSE2: cost of 2 {{.*}} %V4F64 = fadd + ; SSE42: cost of 2 {{.*}} %V4F64 = fadd + ; AVX: cost of 1 {{.*}} %V4F64 = fadd + ; AVX2: cost of 1 {{.*}} %V4F64 = fadd + ; AVX512: cost of 1 {{.*}} %V4F64 = fadd %V4F64 = fadd <4 x double> undef, undef - ; SSE2: cost of 8 {{.*}} %V8F64 = fadd - ; SSE42: cost of 8 {{.*}} %V8F64 = fadd - ; AVX: cost of 4 {{.*}} %V8F64 = fadd - ; AVX2: cost of 4 {{.*}} %V8F64 = fadd - ; AVX512: cost of 2 {{.*}} %V8F64 = fadd + ; SSE2: cost of 4 {{.*}} %V8F64 = fadd + ; SSE42: cost of 4 {{.*}} %V8F64 = fadd + ; AVX: cost of 2 {{.*}} %V8F64 = fadd + ; AVX2: cost of 2 {{.*}} %V8F64 = fadd + ; AVX512: cost of 1 {{.*}} %V8F64 = fadd %V8F64 = fadd <8 x double> undef, undef ret i32 undef @@ -65,54 +65,54 @@ define i32 @fadd(i32 %arg) { ; CHECK-LABEL: 'fsub' define i32 @fsub(i32 %arg) { - ; SSE2: cost of 2 {{.*}} %F32 = fsub - ; SSE42: cost of 2 {{.*}} %F32 = fsub - ; AVX: cost of 2 {{.*}} %F32 = fsub - ; AVX2: cost of 2 {{.*}} %F32 = fsub - ; AVX512: cost of 2 {{.*}} %F32 = fsub + ; SSE2: cost of 1 {{.*}} %F32 = fsub + ; SSE42: cost of 1 {{.*}} %F32 = fsub + ; AVX: cost of 1 {{.*}} %F32 = fsub + ; AVX2: cost of 1 {{.*}} %F32 = fsub + ; AVX512: cost of 1 {{.*}} %F32 = fsub %F32 = fsub float undef, undef - ; SSE2: cost of 2 {{.*}} %V4F32 = fsub - ; SSE42: cost of 2 {{.*}} %V4F32 = fsub - ; AVX: cost of 2 {{.*}} %V4F32 = fsub - ; AVX2: cost of 2 {{.*}} %V4F32 = fsub - ; AVX512: cost of 2 {{.*}} %V4F32 = fsub + ; SSE2: cost of 1 {{.*}} %V4F32 = fsub + ; SSE42: cost of 1 {{.*}} %V4F32 = fsub + ; AVX: cost of 1 {{.*}} %V4F32 = fsub + ; AVX2: cost of 1 {{.*}} %V4F32 = fsub + ; AVX512: cost of 1 {{.*}} %V4F32 = fsub %V4F32 = fsub <4 x float> undef, undef - ; SSE2: cost of 4 {{.*}} %V8F32 = fsub - ; SSE42: cost of 4 {{.*}} %V8F32 = fsub - ; AVX: cost of 2 {{.*}} %V8F32 = fsub - ; AVX2: cost of 2 {{.*}} %V8F32 = fsub - ; AVX512: cost of 2 {{.*}} %V8F32 = fsub + ; SSE2: cost of 2 {{.*}} %V8F32 = fsub + ; SSE42: cost of 2 {{.*}} %V8F32 = fsub + ; AVX: cost of 1 {{.*}} %V8F32 = fsub + ; AVX2: cost of 1 {{.*}} %V8F32 = fsub + ; AVX512: cost of 1 {{.*}} %V8F32 = fsub %V8F32 = fsub <8 x float> undef, undef - ; SSE2: cost of 8 {{.*}} %V16F32 = fsub - ; SSE42: cost of 8 {{.*}} %V16F32 = fsub - ; AVX: cost of 4 {{.*}} %V16F32 = fsub - ; AVX2: cost of 4 {{.*}} %V16F32 = fsub - ; AVX512: cost of 2 {{.*}} %V16F32 = fsub + ; SSE2: cost of 4 {{.*}} %V16F32 = fsub + ; SSE42: cost of 4 {{.*}} %V16F32 = fsub + ; AVX: cost of 2 {{.*}} %V16F32 = fsub + ; AVX2: cost of 2 {{.*}} %V16F32 = fsub + ; AVX512: cost of 1 {{.*}} %V16F32 = fsub %V16F32 = fsub <16 x float> undef, undef - ; SSE2: cost of 2 {{.*}} %F64 = fsub - ; SSE42: cost of 2 {{.*}} %F64 = fsub - ; AVX: cost of 2 {{.*}} %F64 = fsub - ; AVX2: cost of 2 {{.*}} %F64 = fsub - ; AVX512: cost of 2 {{.*}} %F64 = fsub + ; SSE2: cost of 1 {{.*}} %F64 = fsub + ; SSE42: cost of 1 {{.*}} %F64 = fsub + ; AVX: cost of 1 {{.*}} %F64 = fsub + ; AVX2: cost of 1 {{.*}} %F64 = fsub + ; AVX512: cost of 1 {{.*}} %F64 = fsub %F64 = fsub double undef, undef - ; SSE2: cost of 2 {{.*}} %V2F64 = fsub - ; SSE42: cost of 2 {{.*}} %V2F64 = fsub - ; AVX: cost of 2 {{.*}} %V2F64 = fsub - ; AVX2: cost of 2 {{.*}} %V2F64 = fsub - ; AVX512: cost of 2 {{.*}} %V2F64 = fsub + ; SSE2: cost of 1 {{.*}} %V2F64 = fsub + ; SSE42: cost of 1 {{.*}} %V2F64 = fsub + ; AVX: cost of 1 {{.*}} %V2F64 = fsub + ; AVX2: cost of 1 {{.*}} %V2F64 = fsub + ; AVX512: cost of 1 {{.*}} %V2F64 = fsub %V2F64 = fsub <2 x double> undef, undef - ; SSE2: cost of 4 {{.*}} %V4F64 = fsub - ; SSE42: cost of 4 {{.*}} %V4F64 = fsub - ; AVX: cost of 2 {{.*}} %V4F64 = fsub - ; AVX2: cost of 2 {{.*}} %V4F64 = fsub - ; AVX512: cost of 2 {{.*}} %V4F64 = fsub + ; SSE2: cost of 2 {{.*}} %V4F64 = fsub + ; SSE42: cost of 2 {{.*}} %V4F64 = fsub + ; AVX: cost of 1 {{.*}} %V4F64 = fsub + ; AVX2: cost of 1 {{.*}} %V4F64 = fsub + ; AVX512: cost of 1 {{.*}} %V4F64 = fsub %V4F64 = fsub <4 x double> undef, undef - ; SSE2: cost of 8 {{.*}} %V8F64 = fsub - ; SSE42: cost of 8 {{.*}} %V8F64 = fsub - ; AVX: cost of 4 {{.*}} %V8F64 = fsub - ; AVX2: cost of 4 {{.*}} %V8F64 = fsub - ; AVX512: cost of 2 {{.*}} %V8F64 = fsub + ; SSE2: cost of 4 {{.*}} %V8F64 = fsub + ; SSE42: cost of 4 {{.*}} %V8F64 = fsub + ; AVX: cost of 2 {{.*}} %V8F64 = fsub + ; AVX2: cost of 2 {{.*}} %V8F64 = fsub + ; AVX512: cost of 1 {{.*}} %V8F64 = fsub %V8F64 = fsub <8 x double> undef, undef ret i32 undef @@ -120,54 +120,54 @@ define i32 @fsub(i32 %arg) { ; CHECK-LABEL: 'fmul' define i32 @fmul(i32 %arg) { - ; SSE2: cost of 2 {{.*}} %F32 = fmul - ; SSE42: cost of 2 {{.*}} %F32 = fmul - ; AVX: cost of 2 {{.*}} %F32 = fmul - ; AVX2: cost of 2 {{.*}} %F32 = fmul - ; AVX512: cost of 2 {{.*}} %F32 = fmul + ; SSE2: cost of 1 {{.*}} %F32 = fmul + ; SSE42: cost of 1 {{.*}} %F32 = fmul + ; AVX: cost of 1 {{.*}} %F32 = fmul + ; AVX2: cost of 1 {{.*}} %F32 = fmul + ; AVX512: cost of 1 {{.*}} %F32 = fmul %F32 = fmul float undef, undef - ; SSE2: cost of 2 {{.*}} %V4F32 = fmul - ; SSE42: cost of 2 {{.*}} %V4F32 = fmul - ; AVX: cost of 2 {{.*}} %V4F32 = fmul - ; AVX2: cost of 2 {{.*}} %V4F32 = fmul - ; AVX512: cost of 2 {{.*}} %V4F32 = fmul + ; SSE2: cost of 1 {{.*}} %V4F32 = fmul + ; SSE42: cost of 1 {{.*}} %V4F32 = fmul + ; AVX: cost of 1 {{.*}} %V4F32 = fmul + ; AVX2: cost of 1 {{.*}} %V4F32 = fmul + ; AVX512: cost of 1 {{.*}} %V4F32 = fmul %V4F32 = fmul <4 x float> undef, undef - ; SSE2: cost of 4 {{.*}} %V8F32 = fmul - ; SSE42: cost of 4 {{.*}} %V8F32 = fmul - ; AVX: cost of 2 {{.*}} %V8F32 = fmul - ; AVX2: cost of 2 {{.*}} %V8F32 = fmul - ; AVX512: cost of 2 {{.*}} %V8F32 = fmul + ; SSE2: cost of 2 {{.*}} %V8F32 = fmul + ; SSE42: cost of 2 {{.*}} %V8F32 = fmul + ; AVX: cost of 1 {{.*}} %V8F32 = fmul + ; AVX2: cost of 1 {{.*}} %V8F32 = fmul + ; AVX512: cost of 1 {{.*}} %V8F32 = fmul %V8F32 = fmul <8 x float> undef, undef - ; SSE2: cost of 8 {{.*}} %V16F32 = fmul - ; SSE42: cost of 8 {{.*}} %V16F32 = fmul - ; AVX: cost of 4 {{.*}} %V16F32 = fmul - ; AVX2: cost of 4 {{.*}} %V16F32 = fmul - ; AVX512: cost of 2 {{.*}} %V16F32 = fmul + ; SSE2: cost of 4 {{.*}} %V16F32 = fmul + ; SSE42: cost of 4 {{.*}} %V16F32 = fmul + ; AVX: cost of 2 {{.*}} %V16F32 = fmul + ; AVX2: cost of 2 {{.*}} %V16F32 = fmul + ; AVX512: cost of 1 {{.*}} %V16F32 = fmul %V16F32 = fmul <16 x float> undef, undef - ; SSE2: cost of 2 {{.*}} %F64 = fmul - ; SSE42: cost of 2 {{.*}} %F64 = fmul - ; AVX: cost of 2 {{.*}} %F64 = fmul - ; AVX2: cost of 2 {{.*}} %F64 = fmul - ; AVX512: cost of 2 {{.*}} %F64 = fmul + ; SSE2: cost of 1 {{.*}} %F64 = fmul + ; SSE42: cost of 1 {{.*}} %F64 = fmul + ; AVX: cost of 1 {{.*}} %F64 = fmul + ; AVX2: cost of 1 {{.*}} %F64 = fmul + ; AVX512: cost of 1 {{.*}} %F64 = fmul %F64 = fmul double undef, undef - ; SSE2: cost of 2 {{.*}} %V2F64 = fmul - ; SSE42: cost of 2 {{.*}} %V2F64 = fmul - ; AVX: cost of 2 {{.*}} %V2F64 = fmul - ; AVX2: cost of 2 {{.*}} %V2F64 = fmul - ; AVX512: cost of 2 {{.*}} %V2F64 = fmul + ; SSE2: cost of 1 {{.*}} %V2F64 = fmul + ; SSE42: cost of 1 {{.*}} %V2F64 = fmul + ; AVX: cost of 1 {{.*}} %V2F64 = fmul + ; AVX2: cost of 1 {{.*}} %V2F64 = fmul + ; AVX512: cost of 1 {{.*}} %V2F64 = fmul %V2F64 = fmul <2 x double> undef, undef - ; SSE2: cost of 4 {{.*}} %V4F64 = fmul - ; SSE42: cost of 4 {{.*}} %V4F64 = fmul - ; AVX: cost of 2 {{.*}} %V4F64 = fmul - ; AVX2: cost of 2 {{.*}} %V4F64 = fmul - ; AVX512: cost of 2 {{.*}} %V4F64 = fmul + ; SSE2: cost of 2 {{.*}} %V4F64 = fmul + ; SSE42: cost of 2 {{.*}} %V4F64 = fmul + ; AVX: cost of 1 {{.*}} %V4F64 = fmul + ; AVX2: cost of 1 {{.*}} %V4F64 = fmul + ; AVX512: cost of 1 {{.*}} %V4F64 = fmul %V4F64 = fmul <4 x double> undef, undef - ; SSE2: cost of 8 {{.*}} %V8F64 = fmul - ; SSE42: cost of 8 {{.*}} %V8F64 = fmul - ; AVX: cost of 4 {{.*}} %V8F64 = fmul - ; AVX2: cost of 4 {{.*}} %V8F64 = fmul - ; AVX512: cost of 2 {{.*}} %V8F64 = fmul + ; SSE2: cost of 4 {{.*}} %V8F64 = fmul + ; SSE42: cost of 4 {{.*}} %V8F64 = fmul + ; AVX: cost of 2 {{.*}} %V8F64 = fmul + ; AVX2: cost of 2 {{.*}} %V8F64 = fmul + ; AVX512: cost of 1 {{.*}} %V8F64 = fmul %V8F64 = fmul <8 x double> undef, undef ret i32 undef @@ -197,7 +197,7 @@ define i32 @fdiv(i32 %arg) { ; SSE42: cost of 56 {{.*}} %V16F32 = fdiv ; AVX: cost of 56 {{.*}} %V16F32 = fdiv ; AVX2: cost of 28 {{.*}} %V16F32 = fdiv - ; AVX512: cost of 2 {{.*}} %V16F32 = fdiv + ; AVX512: cost of 1 {{.*}} %V16F32 = fdiv %V16F32 = fdiv <16 x float> undef, undef ; SSE2: cost of 38 {{.*}} %F64 = fdiv @@ -222,7 +222,7 @@ define i32 @fdiv(i32 %arg) { ; SSE42: cost of 88 {{.*}} %V8F64 = fdiv ; AVX: cost of 88 {{.*}} %V8F64 = fdiv ; AVX2: cost of 56 {{.*}} %V8F64 = fdiv - ; AVX512: cost of 2 {{.*}} %V8F64 = fdiv + ; AVX512: cost of 1 {{.*}} %V8F64 = fdiv %V8F64 = fdiv <8 x double> undef, undef ret i32 undef @@ -230,54 +230,54 @@ define i32 @fdiv(i32 %arg) { ; CHECK-LABEL: 'frem' define i32 @frem(i32 %arg) { - ; SSE2: cost of 2 {{.*}} %F32 = frem - ; SSE42: cost of 2 {{.*}} %F32 = frem - ; AVX: cost of 2 {{.*}} %F32 = frem - ; AVX2: cost of 2 {{.*}} %F32 = frem - ; AVX512: cost of 2 {{.*}} %F32 = frem + ; SSE2: cost of 1 {{.*}} %F32 = frem + ; SSE42: cost of 1 {{.*}} %F32 = frem + ; AVX: cost of 1 {{.*}} %F32 = frem + ; AVX2: cost of 1 {{.*}} %F32 = frem + ; AVX512: cost of 1 {{.*}} %F32 = frem %F32 = frem float undef, undef - ; SSE2: cost of 14 {{.*}} %V4F32 = frem - ; SSE42: cost of 14 {{.*}} %V4F32 = frem - ; AVX: cost of 14 {{.*}} %V4F32 = frem - ; AVX2: cost of 14 {{.*}} %V4F32 = frem - ; AVX512: cost of 14 {{.*}} %V4F32 = frem + ; SSE2: cost of 10 {{.*}} %V4F32 = frem + ; SSE42: cost of 10 {{.*}} %V4F32 = frem + ; AVX: cost of 10 {{.*}} %V4F32 = frem + ; AVX2: cost of 10 {{.*}} %V4F32 = frem + ; AVX512: cost of 10 {{.*}} %V4F32 = frem %V4F32 = frem <4 x float> undef, undef - ; SSE2: cost of 28 {{.*}} %V8F32 = frem - ; SSE42: cost of 28 {{.*}} %V8F32 = frem - ; AVX: cost of 30 {{.*}} %V8F32 = frem - ; AVX2: cost of 30 {{.*}} %V8F32 = frem - ; AVX512: cost of 30 {{.*}} %V8F32 = frem + ; SSE2: cost of 20 {{.*}} %V8F32 = frem + ; SSE42: cost of 20 {{.*}} %V8F32 = frem + ; AVX: cost of 22 {{.*}} %V8F32 = frem + ; AVX2: cost of 22 {{.*}} %V8F32 = frem + ; AVX512: cost of 22 {{.*}} %V8F32 = frem %V8F32 = frem <8 x float> undef, undef - ; SSE2: cost of 56 {{.*}} %V16F32 = frem - ; SSE42: cost of 56 {{.*}} %V16F32 = frem - ; AVX: cost of 60 {{.*}} %V16F32 = frem - ; AVX2: cost of 60 {{.*}} %V16F32 = frem - ; AVX512: cost of 62 {{.*}} %V16F32 = frem + ; SSE2: cost of 40 {{.*}} %V16F32 = frem + ; SSE42: cost of 40 {{.*}} %V16F32 = frem + ; AVX: cost of 44 {{.*}} %V16F32 = frem + ; AVX2: cost of 44 {{.*}} %V16F32 = frem + ; AVX512: cost of 46 {{.*}} %V16F32 = frem %V16F32 = frem <16 x float> undef, undef - ; SSE2: cost of 2 {{.*}} %F64 = frem - ; SSE42: cost of 2 {{.*}} %F64 = frem - ; AVX: cost of 2 {{.*}} %F64 = frem - ; AVX2: cost of 2 {{.*}} %F64 = frem - ; AVX512: cost of 2 {{.*}} %F64 = frem + ; SSE2: cost of 1 {{.*}} %F64 = frem + ; SSE42: cost of 1 {{.*}} %F64 = frem + ; AVX: cost of 1 {{.*}} %F64 = frem + ; AVX2: cost of 1 {{.*}} %F64 = frem + ; AVX512: cost of 1 {{.*}} %F64 = frem %F64 = frem double undef, undef - ; SSE2: cost of 6 {{.*}} %V2F64 = frem - ; SSE42: cost of 6 {{.*}} %V2F64 = frem - ; AVX: cost of 6 {{.*}} %V2F64 = frem - ; AVX2: cost of 6 {{.*}} %V2F64 = frem - ; AVX512: cost of 6 {{.*}} %V2F64 = frem + ; SSE2: cost of 4 {{.*}} %V2F64 = frem + ; SSE42: cost of 4 {{.*}} %V2F64 = frem + ; AVX: cost of 4 {{.*}} %V2F64 = frem + ; AVX2: cost of 4 {{.*}} %V2F64 = frem + ; AVX512: cost of 4 {{.*}} %V2F64 = frem %V2F64 = frem <2 x double> undef, undef - ; SSE2: cost of 12 {{.*}} %V4F64 = frem - ; SSE42: cost of 12 {{.*}} %V4F64 = frem - ; AVX: cost of 14 {{.*}} %V4F64 = frem - ; AVX2: cost of 14 {{.*}} %V4F64 = frem - ; AVX512: cost of 14 {{.*}} %V4F64 = frem + ; SSE2: cost of 8 {{.*}} %V4F64 = frem + ; SSE42: cost of 8 {{.*}} %V4F64 = frem + ; AVX: cost of 10 {{.*}} %V4F64 = frem + ; AVX2: cost of 10 {{.*}} %V4F64 = frem + ; AVX512: cost of 10 {{.*}} %V4F64 = frem %V4F64 = frem <4 x double> undef, undef - ; SSE2: cost of 24 {{.*}} %V8F64 = frem - ; SSE42: cost of 24 {{.*}} %V8F64 = frem - ; AVX: cost of 28 {{.*}} %V8F64 = frem - ; AVX2: cost of 28 {{.*}} %V8F64 = frem - ; AVX512: cost of 30 {{.*}} %V8F64 = frem + ; SSE2: cost of 16 {{.*}} %V8F64 = frem + ; SSE42: cost of 16 {{.*}} %V8F64 = frem + ; AVX: cost of 20 {{.*}} %V8F64 = frem + ; AVX2: cost of 20 {{.*}} %V8F64 = frem + ; AVX512: cost of 22 {{.*}} %V8F64 = frem %V8F64 = frem <8 x double> undef, undef ret i32 undef diff --git a/llvm/test/Analysis/CostModel/X86/intrinsic-cost.ll b/llvm/test/Analysis/CostModel/X86/intrinsic-cost.ll index efc1263373e..2c4b7139f90 100644 --- a/llvm/test/Analysis/CostModel/X86/intrinsic-cost.ll +++ b/llvm/test/Analysis/CostModel/X86/intrinsic-cost.ll @@ -78,10 +78,10 @@ for.end: ; preds = %vector.body ret void ; CORE2: Printing analysis 'Cost Model Analysis' for function 'test3': -; CORE2: Cost Model: Found an estimated cost of 4 for instruction: %2 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %wide.load, <4 x float> %b, <4 x float> %c) +; CORE2: Cost Model: Found an estimated cost of 2 for instruction: %2 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %wide.load, <4 x float> %b, <4 x float> %c) ; COREI7: Printing analysis 'Cost Model Analysis' for function 'test3': -; COREI7: Cost Model: Found an estimated cost of 4 for instruction: %2 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %wide.load, <4 x float> %b, <4 x float> %c) +; COREI7: Cost Model: Found an estimated cost of 2 for instruction: %2 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %wide.load, <4 x float> %b, <4 x float> %c) } diff --git a/llvm/test/Analysis/CostModel/X86/reduction.ll b/llvm/test/Analysis/CostModel/X86/reduction.ll index 45e2215cd36..296d14bc797 100644 --- a/llvm/test/Analysis/CostModel/X86/reduction.ll +++ b/llvm/test/Analysis/CostModel/X86/reduction.ll @@ -11,8 +11,8 @@ define fastcc float @reduction_cost_float(<4 x float> %rdx) { ; Check that we recognize the tree starting at the extractelement as a ; reduction. -; CHECK-LABEL: reduction_cost -; CHECK: cost of 9 {{.*}} extractelement +; CHECK-LABEL: reduction_cost_float +; CHECK: cost of 7 {{.*}} extractelement %r = extractelement <4 x float> %bin.rdx8, i32 0 ret float %r @@ -54,7 +54,7 @@ define fastcc float @pairwise_hadd(<4 x float> %rdx, float %f1) { %bin.rdx.1 = fadd <4 x float> %rdx.shuf.1.0, %rdx.shuf.1.1 ; CHECK-LABEL: pairwise_hadd -; CHECK: cost of 11 {{.*}} extractelement +; CHECK: cost of 9 {{.*}} extractelement %r = extractelement <4 x float> %bin.rdx.1, i32 0 %r2 = fadd float %r, %f1 @@ -74,7 +74,7 @@ define fastcc float @pairwise_hadd_assoc(<4 x float> %rdx, float %f1) { %bin.rdx.1 = fadd <4 x float> %rdx.shuf.1.0, %rdx.shuf.1.1 ; CHECK-LABEL: pairwise_hadd_assoc -; CHECK: cost of 11 {{.*}} extractelement +; CHECK: cost of 9 {{.*}} extractelement %r = extractelement <4 x float> %bin.rdx.1, i32 0 %r2 = fadd float %r, %f1 |
