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-rw-r--r--llvm/test/Analysis/CostModel/AMDGPU/shifts.ll61
1 files changed, 61 insertions, 0 deletions
diff --git a/llvm/test/Analysis/CostModel/AMDGPU/shifts.ll b/llvm/test/Analysis/CostModel/AMDGPU/shifts.ll
new file mode 100644
index 00000000000..003aed7b2fc
--- /dev/null
+++ b/llvm/test/Analysis/CostModel/AMDGPU/shifts.ll
@@ -0,0 +1,61 @@
+; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=+half-rate-64-ops < %s | FileCheck -check-prefix=ALL -check-prefix=FAST64 %s
+; RUN: opt -cost-model -analyze -mtriple=amdgcn-unknown-amdhsa -mattr=-half-rate-64-ops < %s | FileCheck -check-prefix=ALL -check-prefix=SLOW64 %s
+
+; ALL: 'shl_i32'
+; ALL: estimated cost of 1 for {{.*}} shl i32
+define void @shl_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
+ %vec = load i32, i32 addrspace(1)* %vaddr
+ %or = shl i32 %vec, %b
+ store i32 %or, i32 addrspace(1)* %out
+ ret void
+}
+
+; ALL: 'shl_i64'
+; FAST64: estimated cost of 2 for {{.*}} shl i64
+; SLOW64: estimated cost of 3 for {{.*}} shl i64
+define void @shl_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %vaddr, i64 %b) #0 {
+ %vec = load i64, i64 addrspace(1)* %vaddr
+ %or = shl i64 %vec, %b
+ store i64 %or, i64 addrspace(1)* %out
+ ret void
+}
+
+; ALL: 'lshr_i32'
+; ALL: estimated cost of 1 for {{.*}} lshr i32
+define void @lshr_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
+ %vec = load i32, i32 addrspace(1)* %vaddr
+ %or = lshr i32 %vec, %b
+ store i32 %or, i32 addrspace(1)* %out
+ ret void
+}
+
+; ALL: 'lshr_i64'
+; FAST64: estimated cost of 2 for {{.*}} lshr i64
+; SLOW64: estimated cost of 3 for {{.*}} lshr i64
+define void @lshr_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %vaddr, i64 %b) #0 {
+ %vec = load i64, i64 addrspace(1)* %vaddr
+ %or = lshr i64 %vec, %b
+ store i64 %or, i64 addrspace(1)* %out
+ ret void
+}
+
+; ALL: 'ashr_i32'
+; ALL: estimated cost of 1 for {{.*}} ashr i32
+define void @ashr_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %vaddr, i32 %b) #0 {
+ %vec = load i32, i32 addrspace(1)* %vaddr
+ %or = ashr i32 %vec, %b
+ store i32 %or, i32 addrspace(1)* %out
+ ret void
+}
+
+; ALL: 'ashr_i64'
+; FAST64: estimated cost of 2 for {{.*}} ashr i64
+; SLOW64: estimated cost of 3 for {{.*}} ashr i64
+define void @ashr_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %vaddr, i64 %b) #0 {
+ %vec = load i64, i64 addrspace(1)* %vaddr
+ %or = ashr i64 %vec, %b
+ store i64 %or, i64 addrspace(1)* %out
+ ret void
+}
+
+attributes #0 = { nounwind }
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