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-rw-r--r--llvm/lib/Support/Triple.cpp5
-rw-r--r--llvm/lib/Target/PowerPC/PPCSubtarget.cpp3
2 files changed, 7 insertions, 1 deletions
diff --git a/llvm/lib/Support/Triple.cpp b/llvm/lib/Support/Triple.cpp
index 5bf93638a21..f2debc443d2 100644
--- a/llvm/lib/Support/Triple.cpp
+++ b/llvm/lib/Support/Triple.cpp
@@ -387,7 +387,7 @@ static Triple::ArchType parseArch(StringRef ArchName) {
// FIXME: Do we need to support these?
.Cases("i786", "i886", "i986", Triple::x86)
.Cases("amd64", "x86_64", "x86_64h", Triple::x86_64)
- .Cases("powerpc", "ppc", "ppc32", Triple::ppc)
+ .Cases("powerpc", "powerpcspe", "ppc", "ppc32", Triple::ppc)
.Cases("powerpc64", "ppu", "ppc64", Triple::ppc64)
.Cases("powerpc64le", "ppc64le", Triple::ppc64le)
.Case("xscale", Triple::arm)
@@ -559,6 +559,9 @@ static Triple::SubArchType parseSubArch(StringRef SubArchName) {
(SubArchName.endswith("r6el") || SubArchName.endswith("r6")))
return Triple::MipsSubArch_r6;
+ if (SubArchName == "powerpcspe")
+ return Triple::PPCSubArch_spe;
+
StringRef ARMSubArch = ARM::getCanonicalArchName(SubArchName);
// For now, this is the small part. Early return.
diff --git a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
index dc19cb0ac30..77122e62dd5 100644
--- a/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
+++ b/llvm/lib/Target/PowerPC/PPCSubtarget.cpp
@@ -151,6 +151,9 @@ void PPCSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
TargetTriple.isMusl())
SecurePlt = true;
+ if (TargetTriple.getSubArch() == Triple::PPCSubArch_spe)
+ HasSPE = true;
+
if (HasSPE && IsPPC64)
report_fatal_error( "SPE is only supported for 32-bit targets.\n", false);
if (HasSPE && (HasAltivec || HasQPX || HasVSX || HasFPU))
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