diff options
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Support/Host.cpp | 10 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86.td | 11 |
2 files changed, 20 insertions, 1 deletions
diff --git a/llvm/lib/Support/Host.cpp b/llvm/lib/Support/Host.cpp index 221a0af76d1..df2d4dcca2a 100644 --- a/llvm/lib/Support/Host.cpp +++ b/llvm/lib/Support/Host.cpp @@ -672,7 +672,9 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model, // Skylake Xeon: case 0x55: *Type = X86::INTEL_COREI7; - if (Features2 & (1 << (X86::FEATURE_AVX512VNNI - 32))) + if (Features3 & (1 << (X86::FEATURE_AVX512BF16 - 64))) + *Subtype = X86::INTEL_COREI7_COOPERLAKE; // "cooperlake" + else if (Features2 & (1 << (X86::FEATURE_AVX512VNNI - 32))) *Subtype = X86::INTEL_COREI7_CASCADELAKE; // "cascadelake" else *Subtype = X86::INTEL_COREI7_SKYLAKE_AVX512; // "skylake-avx512" @@ -748,6 +750,12 @@ getIntelProcessorTypeAndSubtype(unsigned Family, unsigned Model, break; } + if (Features3 & (1 << (X86::FEATURE_AVX512BF16 - 64))) { + *Type = X86::INTEL_COREI7; + *Subtype = X86::INTEL_COREI7_COOPERLAKE; + break; + } + if (Features2 & (1 << (X86::FEATURE_AVX512VNNI - 32))) { *Type = X86::INTEL_COREI7; *Subtype = X86::INTEL_COREI7_CASCADELAKE; diff --git a/llvm/lib/Target/X86/X86.td b/llvm/lib/Target/X86/X86.td index 52d90d711c0..3112f00c91f 100644 --- a/llvm/lib/Target/X86/X86.td +++ b/llvm/lib/Target/X86/X86.td @@ -616,6 +616,15 @@ def ProcessorFeatures { list<SubtargetFeature> CLXFeatures = !listconcat(CLXInheritableFeatures, CLXSpecificFeatures); + // Cooperlake + list<SubtargetFeature> CPXAdditionalFeatures = [FeatureBF16]; + list<SubtargetFeature> CPXSpecificFeatures = [FeatureHasFastGather, + FeaturePOPCNTFalseDeps]; + list<SubtargetFeature> CPXInheritableFeatures = + !listconcat(CLXInheritableFeatures, CPXAdditionalFeatures); + list<SubtargetFeature> CPXFeatures = + !listconcat(CPXInheritableFeatures, CPXSpecificFeatures); + // Cannonlake list<SubtargetFeature> CNLAdditionalFeatures = [FeatureAVX512, FeatureCDI, @@ -1076,6 +1085,8 @@ foreach P = ["skylake-avx512", "skx"] in { def : ProcessorModel<"cascadelake", SkylakeServerModel, ProcessorFeatures.CLXFeatures>; +def : ProcessorModel<"cooperlake", SkylakeServerModel, + ProcessorFeatures.CPXFeatures>; def : ProcessorModel<"cannonlake", SkylakeServerModel, ProcessorFeatures.CNLFeatures>; def : ProcessorModel<"icelake-client", SkylakeServerModel, |
